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05f9e36370
Add support for the resets on Microchip's PolarFire SoC (MPFS). Reset control is a single register, wedged in between registers for clock control. To fit with existed DT etc, the reset controller is created using the aux device framework & set up in the clock driver. Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Daire McNamara <daire.mcnamara@microchip.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220909123123.2699583-6-conor.dooley@microchip.com
44 lines
1.9 KiB
Makefile
44 lines
1.9 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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obj-y += core.o
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obj-y += hisilicon/
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obj-$(CONFIG_ARCH_STI) += sti/
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obj-$(CONFIG_ARCH_TEGRA) += tegra/
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obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o
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obj-$(CONFIG_RESET_ATH79) += reset-ath79.o
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obj-$(CONFIG_RESET_AXS10X) += reset-axs10x.o
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obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o
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obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o
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obj-$(CONFIG_RESET_BRCMSTB) += reset-brcmstb.o
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obj-$(CONFIG_RESET_BRCMSTB_RESCAL) += reset-brcmstb-rescal.o
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obj-$(CONFIG_RESET_HSDK) += reset-hsdk.o
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obj-$(CONFIG_RESET_IMX7) += reset-imx7.o
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obj-$(CONFIG_RESET_INTEL_GW) += reset-intel-gw.o
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obj-$(CONFIG_RESET_K210) += reset-k210.o
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obj-$(CONFIG_RESET_LANTIQ) += reset-lantiq.o
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obj-$(CONFIG_RESET_LPC18XX) += reset-lpc18xx.o
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obj-$(CONFIG_RESET_MCHP_SPARX5) += reset-microchip-sparx5.o
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obj-$(CONFIG_RESET_MESON) += reset-meson.o
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obj-$(CONFIG_RESET_MESON_AUDIO_ARB) += reset-meson-audio-arb.o
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obj-$(CONFIG_RESET_NPCM) += reset-npcm.o
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obj-$(CONFIG_RESET_OXNAS) += reset-oxnas.o
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obj-$(CONFIG_RESET_PISTACHIO) += reset-pistachio.o
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obj-$(CONFIG_RESET_POLARFIRE_SOC) += reset-mpfs.o
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obj-$(CONFIG_RESET_QCOM_AOSS) += reset-qcom-aoss.o
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obj-$(CONFIG_RESET_QCOM_PDC) += reset-qcom-pdc.o
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obj-$(CONFIG_RESET_RASPBERRYPI) += reset-raspberrypi.o
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obj-$(CONFIG_RESET_RZG2L_USBPHY_CTRL) += reset-rzg2l-usbphy-ctrl.o
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obj-$(CONFIG_RESET_SCMI) += reset-scmi.o
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obj-$(CONFIG_RESET_SIMPLE) += reset-simple.o
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obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o
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obj-$(CONFIG_RESET_STARFIVE_JH7100) += reset-starfive-jh7100.o
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obj-$(CONFIG_RESET_SUNPLUS) += reset-sunplus.o
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obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
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obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o
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obj-$(CONFIG_RESET_TI_SYSCON) += reset-ti-syscon.o
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obj-$(CONFIG_RESET_TI_TPS380X) += reset-tps380x.o
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obj-$(CONFIG_RESET_TN48M_CPLD) += reset-tn48m.o
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obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o
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obj-$(CONFIG_RESET_UNIPHIER_GLUE) += reset-uniphier-glue.o
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obj-$(CONFIG_RESET_ZYNQ) += reset-zynq.o
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obj-$(CONFIG_ARCH_ZYNQMP) += reset-zynqmp.o
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