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361db10f61
Most of the CPUFreq drivers do similar things in .exit() and .verify() routines and .attr. So its better if we have generic routines for them which can be used by cpufreq drivers then. This patch uses these generic routines in the cris driver. Cc: Jesper Nilsson <jesper.nilsson@axis.com> Cc: Mikael Starvik <starvik@axis.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
121 lines
3.0 KiB
C
121 lines
3.0 KiB
C
#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/cpufreq.h>
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#include <hwregs/reg_map.h>
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#include <hwregs/reg_rdwr.h>
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#include <hwregs/clkgen_defs.h>
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#include <hwregs/ddr2_defs.h>
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static int
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cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val,
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void *data);
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static struct notifier_block cris_sdram_freq_notifier_block = {
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.notifier_call = cris_sdram_freq_notifier
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};
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static struct cpufreq_frequency_table cris_freq_table[] = {
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{0x01, 6000},
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{0x02, 200000},
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{0, CPUFREQ_TABLE_END},
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};
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static unsigned int cris_freq_get_cpu_frequency(unsigned int cpu)
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{
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reg_clkgen_rw_clk_ctrl clk_ctrl;
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clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl);
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return clk_ctrl.pll ? 200000 : 6000;
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}
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static void cris_freq_set_cpu_state(struct cpufreq_policy *policy,
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unsigned int state)
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{
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struct cpufreq_freqs freqs;
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reg_clkgen_rw_clk_ctrl clk_ctrl;
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clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl);
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freqs.old = cris_freq_get_cpu_frequency(policy->cpu);
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freqs.new = cris_freq_table[state].frequency;
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cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
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local_irq_disable();
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/* Even though we may be SMP they will share the same clock
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* so all settings are made on CPU0. */
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if (cris_freq_table[state].frequency == 200000)
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clk_ctrl.pll = 1;
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else
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clk_ctrl.pll = 0;
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REG_WR(clkgen, regi_clkgen, rw_clk_ctrl, clk_ctrl);
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local_irq_enable();
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cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
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};
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static int cris_freq_target(struct cpufreq_policy *policy,
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unsigned int target_freq,
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unsigned int relation)
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{
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unsigned int newstate = 0;
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if (cpufreq_frequency_table_target(policy, cris_freq_table,
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target_freq, relation, &newstate))
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return -EINVAL;
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cris_freq_set_cpu_state(policy, newstate);
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return 0;
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}
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static int cris_freq_cpu_init(struct cpufreq_policy *policy)
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{
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/* cpuinfo and default policy values */
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policy->cpuinfo.transition_latency = 1000000; /* 1ms */
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policy->cur = cris_freq_get_cpu_frequency(0);
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return cpufreq_table_validate_and_show(policy, cris_freq_table);
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}
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static struct cpufreq_driver cris_freq_driver = {
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.get = cris_freq_get_cpu_frequency,
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.verify = cpufreq_generic_frequency_table_verify,
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.target = cris_freq_target,
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.init = cris_freq_cpu_init,
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.exit = cpufreq_generic_exit,
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.name = "cris_freq",
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.attr = cpufreq_generic_attr,
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};
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static int __init cris_freq_init(void)
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{
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int ret;
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ret = cpufreq_register_driver(&cris_freq_driver);
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cpufreq_register_notifier(&cris_sdram_freq_notifier_block,
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CPUFREQ_TRANSITION_NOTIFIER);
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return ret;
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}
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static int
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cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val,
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void *data)
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{
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int i;
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struct cpufreq_freqs *freqs = data;
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if (val == CPUFREQ_PRECHANGE) {
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reg_ddr2_rw_cfg cfg =
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REG_RD(ddr2, regi_ddr2_ctrl, rw_cfg);
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cfg.ref_interval = (freqs->new == 200000 ? 1560 : 46);
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if (freqs->new == 200000)
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for (i = 0; i < 50000; i++);
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REG_WR(bif_core, regi_bif_core, rw_sdram_timing, timing);
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}
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return 0;
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}
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module_init(cris_freq_init);
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