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f59a2d22a0
On a dual issue processor GCC generates code that saves a couple of clock cycles per loop if we rearrange things slightly. Checking for p != end saves a SLTU per loop, moving the increment to the middle can let it dual issue on multi-issue processors. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4249/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
81 lines
1.6 KiB
C
81 lines
1.6 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1999, 2000 by Silicon Graphics
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* Copyright (C) 2003 by Ralf Baechle
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*/
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#include <linux/init.h>
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#include <linux/mm.h>
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#include <asm/fixmap.h>
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#include <asm/pgtable.h>
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#include <asm/pgalloc.h>
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void pgd_init(unsigned long page)
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{
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unsigned long *p, *end;
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unsigned long entry;
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#ifdef __PAGETABLE_PMD_FOLDED
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entry = (unsigned long)invalid_pte_table;
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#else
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entry = (unsigned long)invalid_pmd_table;
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#endif
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p = (unsigned long *) page;
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end = p + PTRS_PER_PGD;
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do {
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p[0] = entry;
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p[1] = entry;
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p[2] = entry;
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p[3] = entry;
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p[4] = entry;
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p += 8;
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p[-3] = entry;
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p[-2] = entry;
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p[-1] = entry;
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} while (p != end);
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}
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#ifndef __PAGETABLE_PMD_FOLDED
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void pmd_init(unsigned long addr, unsigned long pagetable)
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{
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unsigned long *p, *end;
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p = (unsigned long *) addr;
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end = p + PTRS_PER_PMD;
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do {
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p[0] = pagetable;
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p[1] = pagetable;
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p[2] = pagetable;
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p[3] = pagetable;
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p[4] = pagetable;
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p += 8;
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p[-3] = pagetable;
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p[-2] = pagetable;
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p[-1] = pagetable;
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} while (p != end);
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}
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#endif
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void __init pagetable_init(void)
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{
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unsigned long vaddr;
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pgd_t *pgd_base;
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/* Initialize the entire pgd. */
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pgd_init((unsigned long)swapper_pg_dir);
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#ifndef __PAGETABLE_PMD_FOLDED
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pmd_init((unsigned long)invalid_pmd_table, (unsigned long)invalid_pte_table);
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#endif
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pgd_base = swapper_pg_dir;
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/*
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* Fixed mappings:
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*/
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vaddr = __fix_to_virt(__end_of_fixed_addresses - 1) & PMD_MASK;
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fixrange_init(vaddr, vaddr + FIXADDR_SIZE, pgd_base);
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}
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