Sudeep Holla 3224dcc5a6 coresight: fix handling of ETM trace register access via sysfs ... The ETM registers are classified into 2 categories: trace and management. The core power domain contains most of the trace unit logic including all(except TRCOSLAR and TRCOSLSR) the trace registers. The debug power domain contains the external debugger interface including all management registers. This patch adds coresight unit specific function coresight_simple_func which can be used for ETM trace registers by providing a ETM specific read function which does smp cross call to ensure the trace core is powered up before the register is accessed. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		2016-08-31 13:05:43 +02:00
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coresight	coresight: fix handling of ETM trace register access via sysfs	2016-08-31 13:05:43 +02:00
intel_th	intel_th: Fixes -stable	2016-07-15 14:19:11 +09:00
stm	stm class: Add runtime power management handling	2016-07-01 11:00:14 +03:00