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316240f66a
This patch is for supporting Epson s1d13xxx framebuffer device for m32r. # Sorry, a little bigger. The Epson s1d13806 is already supported by 2.6.12 kernel, and its driver is placed as drivers/video/s1d13xxxfb.c. For the m32r, a header file include/asm-m32r/s1d13806.h was prepared for several m32r target platforms. It was originally generated by an Epson tool S1D13806CFG.EXE, and modified manually for the m32r platforms. Signed-off-by: Hayato Fujiwara <fujiwara@linux-m32r.org> Signed-off-by: Hirokazu Takata <takata@linux-m32r.org> Cc: "Antonino A. Daplas" <adaplas@pol.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
257 lines
6.7 KiB
C
257 lines
6.7 KiB
C
/*
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* linux/arch/m32r/kernel/setup_mappi3.c
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*
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* Setup routines for Renesas MAPPI-III(M3A-2170) Board
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*
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* Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
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* Hitoshi Yamamoto, Mamoru Sakugawa
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*/
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#include <linux/config.h>
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#include <linux/irq.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <asm/system.h>
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#include <asm/m32r.h>
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#include <asm/io.h>
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#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
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#ifndef CONFIG_SMP
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typedef struct {
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unsigned long icucr; /* ICU Control Register */
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} icu_data_t;
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#endif /* CONFIG_SMP */
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icu_data_t icu_data[NR_IRQS];
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static void disable_mappi3_irq(unsigned int irq)
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{
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unsigned long port, data;
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if ((irq == 0) ||(irq >= NR_IRQS)) {
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printk("bad irq 0x%08x\n", irq);
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return;
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}
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port = irq2port(irq);
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data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
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outl(data, port);
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}
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static void enable_mappi3_irq(unsigned int irq)
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{
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unsigned long port, data;
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if ((irq == 0) ||(irq >= NR_IRQS)) {
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printk("bad irq 0x%08x\n", irq);
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return;
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}
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port = irq2port(irq);
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data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
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outl(data, port);
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}
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static void mask_and_ack_mappi3(unsigned int irq)
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{
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disable_mappi3_irq(irq);
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}
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static void end_mappi3_irq(unsigned int irq)
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{
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enable_mappi3_irq(irq);
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}
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static unsigned int startup_mappi3_irq(unsigned int irq)
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{
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enable_mappi3_irq(irq);
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return (0);
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}
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static void shutdown_mappi3_irq(unsigned int irq)
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{
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unsigned long port;
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port = irq2port(irq);
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outl(M32R_ICUCR_ILEVEL7, port);
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}
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static struct hw_interrupt_type mappi3_irq_type =
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{
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.typename = "MAPPI3-IRQ",
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.startup = startup_mappi3_irq,
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.shutdown = shutdown_mappi3_irq,
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.enable = enable_mappi3_irq,
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.disable = disable_mappi3_irq,
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.ack = mask_and_ack_mappi3,
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.end = end_mappi3_irq
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};
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void __init init_IRQ(void)
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{
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#if defined(CONFIG_SMC91X)
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/* INT0 : LAN controller (SMC91111) */
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irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
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irq_desc[M32R_IRQ_INT0].handler = &mappi3_irq_type;
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irq_desc[M32R_IRQ_INT0].action = 0;
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irq_desc[M32R_IRQ_INT0].depth = 1;
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icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
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disable_mappi3_irq(M32R_IRQ_INT0);
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#endif /* CONFIG_SMC91X */
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/* MFT2 : system timer */
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irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
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irq_desc[M32R_IRQ_MFT2].handler = &mappi3_irq_type;
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irq_desc[M32R_IRQ_MFT2].action = 0;
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irq_desc[M32R_IRQ_MFT2].depth = 1;
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icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
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disable_mappi3_irq(M32R_IRQ_MFT2);
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#ifdef CONFIG_SERIAL_M32R_SIO
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/* SIO0_R : uart receive data */
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irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
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irq_desc[M32R_IRQ_SIO0_R].handler = &mappi3_irq_type;
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irq_desc[M32R_IRQ_SIO0_R].action = 0;
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irq_desc[M32R_IRQ_SIO0_R].depth = 1;
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icu_data[M32R_IRQ_SIO0_R].icucr = 0;
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disable_mappi3_irq(M32R_IRQ_SIO0_R);
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/* SIO0_S : uart send data */
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irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
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irq_desc[M32R_IRQ_SIO0_S].handler = &mappi3_irq_type;
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irq_desc[M32R_IRQ_SIO0_S].action = 0;
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irq_desc[M32R_IRQ_SIO0_S].depth = 1;
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icu_data[M32R_IRQ_SIO0_S].icucr = 0;
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disable_mappi3_irq(M32R_IRQ_SIO0_S);
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/* SIO1_R : uart receive data */
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irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
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irq_desc[M32R_IRQ_SIO1_R].handler = &mappi3_irq_type;
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irq_desc[M32R_IRQ_SIO1_R].action = 0;
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irq_desc[M32R_IRQ_SIO1_R].depth = 1;
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icu_data[M32R_IRQ_SIO1_R].icucr = 0;
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disable_mappi3_irq(M32R_IRQ_SIO1_R);
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/* SIO1_S : uart send data */
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irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
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irq_desc[M32R_IRQ_SIO1_S].handler = &mappi3_irq_type;
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irq_desc[M32R_IRQ_SIO1_S].action = 0;
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irq_desc[M32R_IRQ_SIO1_S].depth = 1;
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icu_data[M32R_IRQ_SIO1_S].icucr = 0;
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disable_mappi3_irq(M32R_IRQ_SIO1_S);
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#endif /* CONFIG_M32R_USE_DBG_CONSOLE */
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#if defined(CONFIG_USB)
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/* INT1 : USB Host controller interrupt */
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irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
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irq_desc[M32R_IRQ_INT1].handler = &mappi3_irq_type;
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irq_desc[M32R_IRQ_INT1].action = 0;
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irq_desc[M32R_IRQ_INT1].depth = 1;
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icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
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disable_mappi3_irq(M32R_IRQ_INT1);
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#endif /* CONFIG_USB */
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/* ICUCR40: CFC IREQ */
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irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
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irq_desc[PLD_IRQ_CFIREQ].handler = &mappi3_irq_type;
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irq_desc[PLD_IRQ_CFIREQ].action = 0;
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irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */
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icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
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disable_mappi3_irq(PLD_IRQ_CFIREQ);
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#if defined(CONFIG_M32R_CFC)
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/* ICUCR41: CFC Insert */
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irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
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irq_desc[PLD_IRQ_CFC_INSERT].handler = &mappi3_irq_type;
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irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
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irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
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icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
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disable_mappi3_irq(PLD_IRQ_CFC_INSERT);
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/* ICUCR42: CFC Eject */
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irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
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irq_desc[PLD_IRQ_CFC_EJECT].handler = &mappi3_irq_type;
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irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
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irq_desc[PLD_IRQ_CFC_EJECT].depth = 1; /* disable nested irq */
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icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
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disable_mappi3_irq(PLD_IRQ_CFC_EJECT);
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#endif /* CONFIG_M32R_CFC */
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}
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#if defined(CONFIG_SMC91X)
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#define LAN_IOSTART 0x300
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#define LAN_IOEND 0x320
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static struct resource smc91x_resources[] = {
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[0] = {
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.start = (LAN_IOSTART),
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.end = (LAN_IOEND),
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = M32R_IRQ_INT0,
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.end = M32R_IRQ_INT0,
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.flags = IORESOURCE_IRQ,
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}
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};
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static struct platform_device smc91x_device = {
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.name = "smc91x",
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.id = 0,
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.num_resources = ARRAY_SIZE(smc91x_resources),
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.resource = smc91x_resources,
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};
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#endif
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#if defined(CONFIG_FB_S1D13XXX)
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#include <video/s1d13xxxfb.h>
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#include <asm/s1d13806.h>
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static struct s1d13xxxfb_pdata s1d13xxxfb_data = {
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.initregs = s1d13xxxfb_initregs,
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.initregssize = ARRAY_SIZE(s1d13xxxfb_initregs),
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.platform_init_video = NULL,
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#ifdef CONFIG_PM
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.platform_suspend_video = NULL,
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.platform_resume_video = NULL,
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#endif
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};
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static struct resource s1d13xxxfb_resources[] = {
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[0] = {
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.start = 0x1d600000UL,
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.end = 0x1d73FFFFUL,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 0x1d400000UL,
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.end = 0x1d4001FFUL,
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.flags = IORESOURCE_MEM,
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}
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};
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static struct platform_device s1d13xxxfb_device = {
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.name = S1D_DEVICENAME,
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.id = 0,
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.dev = {
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.platform_data = &s1d13xxxfb_data,
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},
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.num_resources = ARRAY_SIZE(s1d13xxxfb_resources),
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.resource = s1d13xxxfb_resources,
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};
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#endif
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static int __init platform_init(void)
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{
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#if defined(CONFIG_SMC91X)
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platform_device_register(&smc91x_device);
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#endif
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#if defined(CONFIG_FB_S1D13XXX)
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platform_device_register(&s1d13xxxfb_device);
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#endif
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return 0;
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}
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arch_initcall(platform_init);
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