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This is a doc-only patch which I hope will reduce the number of spi_master controller driver patches starting out with a common implementation bug. (As in: almost every spi_master driver I see starts out with its version of this bug. Sigh.) It just re-emphasizes that the setup() method may be called for one device while a transfer is active on another ... which means that most driver implementations shouldn't touch any registers. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
565 lines
23 KiB
Plaintext
565 lines
23 KiB
Plaintext
Overview of Linux kernel SPI support
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====================================
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21-May-2007
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What is SPI?
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------------
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The "Serial Peripheral Interface" (SPI) is a synchronous four wire serial
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link used to connect microcontrollers to sensors, memory, and peripherals.
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It's a simple "de facto" standard, not complicated enough to acquire a
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standardization body. SPI uses a master/slave configuration.
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The three signal wires hold a clock (SCK, often on the order of 10 MHz),
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and parallel data lines with "Master Out, Slave In" (MOSI) or "Master In,
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Slave Out" (MISO) signals. (Other names are also used.) There are four
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clocking modes through which data is exchanged; mode-0 and mode-3 are most
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commonly used. Each clock cycle shifts data out and data in; the clock
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doesn't cycle except when there is a data bit to shift. Not all data bits
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are used though; not every protocol uses those full duplex capabilities.
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SPI masters use a fourth "chip select" line to activate a given SPI slave
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device, so those three signal wires may be connected to several chips
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in parallel. All SPI slaves support chipselects; they are usually active
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low signals, labeled nCSx for slave 'x' (e.g. nCS0). Some devices have
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other signals, often including an interrupt to the master.
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Unlike serial busses like USB or SMBus, even low level protocols for
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SPI slave functions are usually not interoperable between vendors
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(except for commodities like SPI memory chips).
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- SPI may be used for request/response style device protocols, as with
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touchscreen sensors and memory chips.
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- It may also be used to stream data in either direction (half duplex),
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or both of them at the same time (full duplex).
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- Some devices may use eight bit words. Others may different word
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lengths, such as streams of 12-bit or 20-bit digital samples.
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- Words are usually sent with their most significant bit (MSB) first,
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but sometimes the least significant bit (LSB) goes first instead.
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- Sometimes SPI is used to daisy-chain devices, like shift registers.
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In the same way, SPI slaves will only rarely support any kind of automatic
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discovery/enumeration protocol. The tree of slave devices accessible from
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a given SPI master will normally be set up manually, with configuration
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tables.
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SPI is only one of the names used by such four-wire protocols, and
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most controllers have no problem handling "MicroWire" (think of it as
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half-duplex SPI, for request/response protocols), SSP ("Synchronous
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Serial Protocol"), PSP ("Programmable Serial Protocol"), and other
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related protocols.
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Some chips eliminate a signal line by combining MOSI and MISO, and
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limiting themselves to half-duplex at the hardware level. In fact
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some SPI chips have this signal mode as a strapping option. These
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can be accessed using the same programming interface as SPI, but of
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course they won't handle full duplex transfers. You may find such
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chips described as using "three wire" signaling: SCK, data, nCSx.
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(That data line is sometimes called MOMI or SISO.)
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Microcontrollers often support both master and slave sides of the SPI
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protocol. This document (and Linux) currently only supports the master
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side of SPI interactions.
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Who uses it? On what kinds of systems?
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---------------------------------------
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Linux developers using SPI are probably writing device drivers for embedded
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systems boards. SPI is used to control external chips, and it is also a
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protocol supported by every MMC or SD memory card. (The older "DataFlash"
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cards, predating MMC cards but using the same connectors and card shape,
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support only SPI.) Some PC hardware uses SPI flash for BIOS code.
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SPI slave chips range from digital/analog converters used for analog
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sensors and codecs, to memory, to peripherals like USB controllers
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or Ethernet adapters; and more.
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Most systems using SPI will integrate a few devices on a mainboard.
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Some provide SPI links on expansion connectors; in cases where no
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dedicated SPI controller exists, GPIO pins can be used to create a
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low speed "bitbanging" adapter. Very few systems will "hotplug" an SPI
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controller; the reasons to use SPI focus on low cost and simple operation,
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and if dynamic reconfiguration is important, USB will often be a more
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appropriate low-pincount peripheral bus.
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Many microcontrollers that can run Linux integrate one or more I/O
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interfaces with SPI modes. Given SPI support, they could use MMC or SD
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cards without needing a special purpose MMC/SD/SDIO controller.
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I'm confused. What are these four SPI "clock modes"?
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-----------------------------------------------------
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It's easy to be confused here, and the vendor documentation you'll
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find isn't necessarily helpful. The four modes combine two mode bits:
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- CPOL indicates the initial clock polarity. CPOL=0 means the
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clock starts low, so the first (leading) edge is rising, and
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the second (trailing) edge is falling. CPOL=1 means the clock
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starts high, so the first (leading) edge is falling.
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- CPHA indicates the clock phase used to sample data; CPHA=0 says
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sample on the leading edge, CPHA=1 means the trailing edge.
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Since the signal needs to stablize before it's sampled, CPHA=0
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implies that its data is written half a clock before the first
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clock edge. The chipselect may have made it become available.
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Chip specs won't always say "uses SPI mode X" in as many words,
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but their timing diagrams will make the CPOL and CPHA modes clear.
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In the SPI mode number, CPOL is the high order bit and CPHA is the
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low order bit. So when a chip's timing diagram shows the clock
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starting low (CPOL=0) and data stabilized for sampling during the
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trailing clock edge (CPHA=1), that's SPI mode 1.
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Note that the clock mode is relevant as soon as the chipselect goes
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active. So the master must set the clock to inactive before selecting
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a slave, and the slave can tell the chosen polarity by sampling the
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clock level when its select line goes active. That's why many devices
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support for example both modes 0 and 3: they don't care about polarity,
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and alway clock data in/out on rising clock edges.
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How do these driver programming interfaces work?
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------------------------------------------------
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The <linux/spi/spi.h> header file includes kerneldoc, as does the
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main source code, and you should certainly read that chapter of the
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kernel API document. This is just an overview, so you get the big
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picture before those details.
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SPI requests always go into I/O queues. Requests for a given SPI device
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are always executed in FIFO order, and complete asynchronously through
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completion callbacks. There are also some simple synchronous wrappers
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for those calls, including ones for common transaction types like writing
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a command and then reading its response.
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There are two types of SPI driver, here called:
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Controller drivers ... controllers may be built in to System-On-Chip
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processors, and often support both Master and Slave roles.
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These drivers touch hardware registers and may use DMA.
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Or they can be PIO bitbangers, needing just GPIO pins.
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Protocol drivers ... these pass messages through the controller
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driver to communicate with a Slave or Master device on the
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other side of an SPI link.
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So for example one protocol driver might talk to the MTD layer to export
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data to filesystems stored on SPI flash like DataFlash; and others might
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control audio interfaces, present touchscreen sensors as input interfaces,
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or monitor temperature and voltage levels during industrial processing.
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And those might all be sharing the same controller driver.
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A "struct spi_device" encapsulates the master-side interface between
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those two types of driver. At this writing, Linux has no slave side
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programming interface.
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There is a minimal core of SPI programming interfaces, focussing on
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using the driver model to connect controller and protocol drivers using
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device tables provided by board specific initialization code. SPI
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shows up in sysfs in several locations:
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/sys/devices/.../CTLR ... physical node for a given SPI controller
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/sys/devices/.../CTLR/spiB.C ... spi_device on bus "B",
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chipselect C, accessed through CTLR.
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/sys/bus/spi/devices/spiB.C ... symlink to that physical
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.../CTLR/spiB.C device
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/sys/devices/.../CTLR/spiB.C/modalias ... identifies the driver
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that should be used with this device (for hotplug/coldplug)
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/sys/bus/spi/drivers/D ... driver for one or more spi*.* devices
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/sys/class/spi_master/spiB ... symlink (or actual device node) to
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a logical node which could hold class related state for the
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controller managing bus "B". All spiB.* devices share one
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physical SPI bus segment, with SCLK, MOSI, and MISO.
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Note that the actual location of the controller's class state depends
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on whether you enabled CONFIG_SYSFS_DEPRECATED or not. At this time,
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the only class-specific state is the bus number ("B" in "spiB"), so
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those /sys/class entries are only useful to quickly identify busses.
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How does board-specific init code declare SPI devices?
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------------------------------------------------------
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Linux needs several kinds of information to properly configure SPI devices.
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That information is normally provided by board-specific code, even for
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chips that do support some of automated discovery/enumeration.
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DECLARE CONTROLLERS
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The first kind of information is a list of what SPI controllers exist.
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For System-on-Chip (SOC) based boards, these will usually be platform
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devices, and the controller may need some platform_data in order to
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operate properly. The "struct platform_device" will include resources
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like the physical address of the controller's first register and its IRQ.
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Platforms will often abstract the "register SPI controller" operation,
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maybe coupling it with code to initialize pin configurations, so that
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the arch/.../mach-*/board-*.c files for several boards can all share the
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same basic controller setup code. This is because most SOCs have several
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SPI-capable controllers, and only the ones actually usable on a given
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board should normally be set up and registered.
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So for example arch/.../mach-*/board-*.c files might have code like:
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#include <mach/spi.h> /* for mysoc_spi_data */
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/* if your mach-* infrastructure doesn't support kernels that can
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* run on multiple boards, pdata wouldn't benefit from "__init".
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*/
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static struct mysoc_spi_data __initdata pdata = { ... };
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static __init board_init(void)
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{
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...
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/* this board only uses SPI controller #2 */
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mysoc_register_spi(2, &pdata);
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...
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}
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And SOC-specific utility code might look something like:
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#include <mach/spi.h>
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static struct platform_device spi2 = { ... };
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void mysoc_register_spi(unsigned n, struct mysoc_spi_data *pdata)
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{
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struct mysoc_spi_data *pdata2;
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pdata2 = kmalloc(sizeof *pdata2, GFP_KERNEL);
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*pdata2 = pdata;
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...
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if (n == 2) {
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spi2->dev.platform_data = pdata2;
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register_platform_device(&spi2);
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/* also: set up pin modes so the spi2 signals are
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* visible on the relevant pins ... bootloaders on
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* production boards may already have done this, but
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* developer boards will often need Linux to do it.
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*/
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}
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...
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}
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Notice how the platform_data for boards may be different, even if the
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same SOC controller is used. For example, on one board SPI might use
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an external clock, where another derives the SPI clock from current
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settings of some master clock.
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DECLARE SLAVE DEVICES
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The second kind of information is a list of what SPI slave devices exist
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on the target board, often with some board-specific data needed for the
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driver to work correctly.
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Normally your arch/.../mach-*/board-*.c files would provide a small table
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listing the SPI devices on each board. (This would typically be only a
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small handful.) That might look like:
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static struct ads7846_platform_data ads_info = {
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.vref_delay_usecs = 100,
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.x_plate_ohms = 580,
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.y_plate_ohms = 410,
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};
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static struct spi_board_info spi_board_info[] __initdata = {
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{
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.modalias = "ads7846",
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.platform_data = &ads_info,
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.mode = SPI_MODE_0,
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.irq = GPIO_IRQ(31),
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.max_speed_hz = 120000 /* max sample rate at 3V */ * 16,
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.bus_num = 1,
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.chip_select = 0,
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},
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};
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Again, notice how board-specific information is provided; each chip may need
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several types. This example shows generic constraints like the fastest SPI
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clock to allow (a function of board voltage in this case) or how an IRQ pin
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is wired, plus chip-specific constraints like an important delay that's
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changed by the capacitance at one pin.
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(There's also "controller_data", information that may be useful to the
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controller driver. An example would be peripheral-specific DMA tuning
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data or chipselect callbacks. This is stored in spi_device later.)
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The board_info should provide enough information to let the system work
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without the chip's driver being loaded. The most troublesome aspect of
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that is likely the SPI_CS_HIGH bit in the spi_device.mode field, since
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sharing a bus with a device that interprets chipselect "backwards" is
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not possible until the infrastructure knows how to deselect it.
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Then your board initialization code would register that table with the SPI
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infrastructure, so that it's available later when the SPI master controller
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driver is registered:
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spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
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Like with other static board-specific setup, you won't unregister those.
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The widely used "card" style computers bundle memory, cpu, and little else
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onto a card that's maybe just thirty square centimeters. On such systems,
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your arch/.../mach-.../board-*.c file would primarily provide information
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about the devices on the mainboard into which such a card is plugged. That
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certainly includes SPI devices hooked up through the card connectors!
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NON-STATIC CONFIGURATIONS
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Developer boards often play by different rules than product boards, and one
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example is the potential need to hotplug SPI devices and/or controllers.
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For those cases you might need to use spi_busnum_to_master() to look
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up the spi bus master, and will likely need spi_new_device() to provide the
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board info based on the board that was hotplugged. Of course, you'd later
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call at least spi_unregister_device() when that board is removed.
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When Linux includes support for MMC/SD/SDIO/DataFlash cards through SPI, those
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configurations will also be dynamic. Fortunately, such devices all support
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basic device identification probes, so they should hotplug normally.
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How do I write an "SPI Protocol Driver"?
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----------------------------------------
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Most SPI drivers are currently kernel drivers, but there's also support
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for userspace drivers. Here we talk only about kernel drivers.
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SPI protocol drivers somewhat resemble platform device drivers:
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static struct spi_driver CHIP_driver = {
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.driver = {
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.name = "CHIP",
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.owner = THIS_MODULE,
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},
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.probe = CHIP_probe,
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.remove = __devexit_p(CHIP_remove),
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.suspend = CHIP_suspend,
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.resume = CHIP_resume,
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};
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The driver core will autmatically attempt to bind this driver to any SPI
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device whose board_info gave a modalias of "CHIP". Your probe() code
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might look like this unless you're creating a device which is managing
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a bus (appearing under /sys/class/spi_master).
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static int __devinit CHIP_probe(struct spi_device *spi)
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{
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struct CHIP *chip;
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struct CHIP_platform_data *pdata;
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/* assuming the driver requires board-specific data: */
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pdata = &spi->dev.platform_data;
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if (!pdata)
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return -ENODEV;
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/* get memory for driver's per-chip state */
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chip = kzalloc(sizeof *chip, GFP_KERNEL);
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if (!chip)
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return -ENOMEM;
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spi_set_drvdata(spi, chip);
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... etc
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return 0;
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}
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As soon as it enters probe(), the driver may issue I/O requests to
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the SPI device using "struct spi_message". When remove() returns,
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or after probe() fails, the driver guarantees that it won't submit
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any more such messages.
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- An spi_message is a sequence of protocol operations, executed
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as one atomic sequence. SPI driver controls include:
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+ when bidirectional reads and writes start ... by how its
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sequence of spi_transfer requests is arranged;
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+ which I/O buffers are used ... each spi_transfer wraps a
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buffer for each transfer direction, supporting full duplex
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(two pointers, maybe the same one in both cases) and half
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duplex (one pointer is NULL) transfers;
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+ optionally defining short delays after transfers ... using
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the spi_transfer.delay_usecs setting (this delay can be the
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only protocol effect, if the buffer length is zero);
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+ whether the chipselect becomes inactive after a transfer and
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any delay ... by using the spi_transfer.cs_change flag;
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+ hinting whether the next message is likely to go to this same
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device ... using the spi_transfer.cs_change flag on the last
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transfer in that atomic group, and potentially saving costs
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for chip deselect and select operations.
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- Follow standard kernel rules, and provide DMA-safe buffers in
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your messages. That way controller drivers using DMA aren't forced
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to make extra copies unless the hardware requires it (e.g. working
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around hardware errata that force the use of bounce buffering).
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If standard dma_map_single() handling of these buffers is inappropriate,
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you can use spi_message.is_dma_mapped to tell the controller driver
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that you've already provided the relevant DMA addresses.
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- The basic I/O primitive is spi_async(). Async requests may be
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issued in any context (irq handler, task, etc) and completion
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is reported using a callback provided with the message.
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After any detected error, the chip is deselected and processing
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of that spi_message is aborted.
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- There are also synchronous wrappers like spi_sync(), and wrappers
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like spi_read(), spi_write(), and spi_write_then_read(). These
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may be issued only in contexts that may sleep, and they're all
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clean (and small, and "optional") layers over spi_async().
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- The spi_write_then_read() call, and convenience wrappers around
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it, should only be used with small amounts of data where the
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cost of an extra copy may be ignored. It's designed to support
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common RPC-style requests, such as writing an eight bit command
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and reading a sixteen bit response -- spi_w8r16() being one its
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wrappers, doing exactly that.
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Some drivers may need to modify spi_device characteristics like the
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transfer mode, wordsize, or clock rate. This is done with spi_setup(),
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which would normally be called from probe() before the first I/O is
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done to the device. However, that can also be called at any time
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that no message is pending for that device.
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While "spi_device" would be the bottom boundary of the driver, the
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upper boundaries might include sysfs (especially for sensor readings),
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the input layer, ALSA, networking, MTD, the character device framework,
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or other Linux subsystems.
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Note that there are two types of memory your driver must manage as part
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of interacting with SPI devices.
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- I/O buffers use the usual Linux rules, and must be DMA-safe.
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You'd normally allocate them from the heap or free page pool.
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Don't use the stack, or anything that's declared "static".
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- The spi_message and spi_transfer metadata used to glue those
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I/O buffers into a group of protocol transactions. These can
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be allocated anywhere it's convenient, including as part of
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other allocate-once driver data structures. Zero-init these.
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If you like, spi_message_alloc() and spi_message_free() convenience
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routines are available to allocate and zero-initialize an spi_message
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with several transfers.
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How do I write an "SPI Master Controller Driver"?
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-------------------------------------------------
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An SPI controller will probably be registered on the platform_bus; write
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a driver to bind to the device, whichever bus is involved.
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The main task of this type of driver is to provide an "spi_master".
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Use spi_alloc_master() to allocate the master, and spi_master_get_devdata()
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|
to get the driver-private data allocated for that device.
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|
|
|
struct spi_master *master;
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|
struct CONTROLLER *c;
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|
|
|
master = spi_alloc_master(dev, sizeof *c);
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|
if (!master)
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|
return -ENODEV;
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|
|
|
c = spi_master_get_devdata(master);
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|
|
|
The driver will initialize the fields of that spi_master, including the
|
|
bus number (maybe the same as the platform device ID) and three methods
|
|
used to interact with the SPI core and SPI protocol drivers. It will
|
|
also initialize its own internal state. (See below about bus numbering
|
|
and those methods.)
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|
|
|
After you initialize the spi_master, then use spi_register_master() to
|
|
publish it to the rest of the system. At that time, device nodes for
|
|
the controller and any predeclared spi devices will be made available,
|
|
and the driver model core will take care of binding them to drivers.
|
|
|
|
If you need to remove your SPI controller driver, spi_unregister_master()
|
|
will reverse the effect of spi_register_master().
|
|
|
|
|
|
BUS NUMBERING
|
|
|
|
Bus numbering is important, since that's how Linux identifies a given
|
|
SPI bus (shared SCK, MOSI, MISO). Valid bus numbers start at zero. On
|
|
SOC systems, the bus numbers should match the numbers defined by the chip
|
|
manufacturer. For example, hardware controller SPI2 would be bus number 2,
|
|
and spi_board_info for devices connected to it would use that number.
|
|
|
|
If you don't have such hardware-assigned bus number, and for some reason
|
|
you can't just assign them, then provide a negative bus number. That will
|
|
then be replaced by a dynamically assigned number. You'd then need to treat
|
|
this as a non-static configuration (see above).
|
|
|
|
|
|
SPI MASTER METHODS
|
|
|
|
master->setup(struct spi_device *spi)
|
|
This sets up the device clock rate, SPI mode, and word sizes.
|
|
Drivers may change the defaults provided by board_info, and then
|
|
call spi_setup(spi) to invoke this routine. It may sleep.
|
|
|
|
Unless each SPI slave has its own configuration registers, don't
|
|
change them right away ... otherwise drivers could corrupt I/O
|
|
that's in progress for other SPI devices.
|
|
|
|
** BUG ALERT: for some reason the first version of
|
|
** many spi_master drivers seems to get this wrong.
|
|
** When you code setup(), ASSUME that the controller
|
|
** is actively processing transfers for another device.
|
|
|
|
master->transfer(struct spi_device *spi, struct spi_message *message)
|
|
This must not sleep. Its responsibility is arrange that the
|
|
transfer happens and its complete() callback is issued. The two
|
|
will normally happen later, after other transfers complete, and
|
|
if the controller is idle it will need to be kickstarted.
|
|
|
|
master->cleanup(struct spi_device *spi)
|
|
Your controller driver may use spi_device.controller_state to hold
|
|
state it dynamically associates with that device. If you do that,
|
|
be sure to provide the cleanup() method to free that state.
|
|
|
|
|
|
SPI MESSAGE QUEUE
|
|
|
|
The bulk of the driver will be managing the I/O queue fed by transfer().
|
|
|
|
That queue could be purely conceptual. For example, a driver used only
|
|
for low-frequency sensor acess might be fine using synchronous PIO.
|
|
|
|
But the queue will probably be very real, using message->queue, PIO,
|
|
often DMA (especially if the root filesystem is in SPI flash), and
|
|
execution contexts like IRQ handlers, tasklets, or workqueues (such
|
|
as keventd). Your driver can be as fancy, or as simple, as you need.
|
|
Such a transfer() method would normally just add the message to a
|
|
queue, and then start some asynchronous transfer engine (unless it's
|
|
already running).
|
|
|
|
|
|
THANKS TO
|
|
---------
|
|
Contributors to Linux-SPI discussions include (in alphabetical order,
|
|
by last name):
|
|
|
|
David Brownell
|
|
Russell King
|
|
Dmitry Pervushin
|
|
Stephen Street
|
|
Mark Underwood
|
|
Andrew Victor
|
|
Vitaly Wool
|
|
|