linux/include/soc
Vladimir Oltean 2d44b097bb net: mscc: ocelot: move NPI port configuration to DSA
Remove the ocelot_configure_cpu() function, which was in fact bringing
up 2 ports: the CPU port module, which both switchdev and DSA have, and
the NPI port, which only DSA has.

The (non-Ethernet) CPU port module is at a fixed index in the analyzer,
whereas the NPI port is selected through the "ethernet" property in the
device tree.

Therefore, the function to set up an NPI port is DSA-specific, so we
move it there, simplifying the ocelot switch library a little bit.

Cc: Horatiu Vultur <horatiu.vultur@microchip.com>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: UNGLinuxDriver <UNGLinuxDriver@microchip.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-09-26 14:17:58 -07:00
..
arc include/: replace HTTP links with HTTPS ones 2020-08-12 10:57:59 -07:00
at91 ARM: at91: add atmel tcb capabilities 2020-07-11 18:57:03 +02:00
bcm2835 firmware: raspberrypi: Introduce vl805 init routine 2020-05-13 10:53:23 +01:00
brcmstb treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
fsl soc: fsl: qe: Replace one-element array and use struct_size() helper 2020-05-22 16:23:02 -05:00
imx ARM: imx: move cpu definitions into a header 2020-05-20 23:03:47 +08:00
mediatek iommu/mediatek: Clean up struct mtk_smi_iommu 2019-08-30 15:57:27 +02:00
mscc net: mscc: ocelot: move NPI port configuration to DSA 2020-09-26 14:17:58 -07:00
nps irqchip/eznps: Fix build error for !ARC700 builds 2020-08-27 13:15:17 -07:00
qcom It looks like a smaller batch of clk updates this time around. In the core 2020-08-07 13:35:51 -07:00
rockchip treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288 2019-06-05 17:36:37 +02:00
sa1100 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
sifive riscv: move sifive_l2_cache.h to include/soc 2020-01-12 10:12:44 -08:00
tegra soc/tegra: Changes for v5.9-rc1 2020-07-17 21:17:20 +02:00