.. |
clk-audio-sync.c
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treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201
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2019-05-30 11:29:52 -07:00 |
clk-bpmp.c
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clk: tegra: bpmp: Clamp clock rates on requests
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2020-11-26 16:28:07 +01:00 |
clk-dfll.c
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clk: tegra: Do not return 0 on failure
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2020-11-20 17:19:46 +01:00 |
clk-dfll.h
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clk: tegra: clk-dfll: Add suspend and resume support
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2019-11-11 14:53:03 +01:00 |
clk-divider.c
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clk: tegra: divider: Check UART's divider enable-bit state on rate's recalculation
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2020-01-10 15:50:05 +01:00 |
clk-id.h
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clk: tegra: Fix duplicated SE clock entry
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2020-12-10 12:51:59 -08:00 |
clk-periph-fixed.c
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treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201
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2019-05-30 11:29:52 -07:00 |
clk-periph-gate.c
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clk: tegra: Don't deassert reset on enabling clocks
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2021-05-31 15:16:46 +02:00 |
clk-periph.c
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clk: tegra: Fix refcounting of gate clocks
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2021-05-31 15:16:24 +02:00 |
clk-pll-out.c
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clk: tegra: pllout: Save and restore pllout context
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2019-11-11 14:53:02 +01:00 |
clk-pll.c
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clk: tegra: Don't allow zero clock rate for PLLs
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2021-05-31 15:16:26 +02:00 |
clk-sdmmc-mux.c
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clk: tegra: Implement disable_unused() of tegra_clk_sdmmc_mux_ops
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2021-07-27 14:54:19 -07:00 |
clk-super.c
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clk: tegra: clk-super: Add restore-context support
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2019-11-11 14:53:03 +01:00 |
clk-tegra20-emc.c
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clk: tegra: Export Tegra20 EMC kernel symbols
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2020-11-06 19:24:04 +01:00 |
clk-tegra20.c
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clk: tegra: Halve SCLK rate on Tegra20
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2021-05-31 15:16:25 +02:00 |
clk-tegra30.c
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clk: tegra: Don't deassert reset on enabling clocks
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2021-05-31 15:16:46 +02:00 |
clk-tegra114.c
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clk: tegra: Remove audio clocks configuration from clock driver
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2020-03-12 12:10:49 +01:00 |
clk-tegra124-dfll-fcpu.c
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clk: tegra: clk-tegra124-dfll-fcpu: don't use devm functions for regulator
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2021-06-25 16:23:07 -07:00 |
clk-tegra124-emc.c
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clk: tegra: tegra124-emc: Fix clock imbalance in emc_set_timing()
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2021-06-02 11:08:00 +02:00 |
clk-tegra124.c
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memory: tegra124-emc: Make driver modular
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2021-01-05 18:00:09 +01:00 |
clk-tegra210-emc.c
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This pull request contains zero diff to the core framework. It is a collection
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2020-10-22 12:53:28 -07:00 |
clk-tegra210.c
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clk: tegra: Add PLLE HW power sequencer control
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2021-03-24 14:01:58 +01:00 |
clk-tegra-audio.c
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treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201
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2019-05-30 11:29:52 -07:00 |
clk-tegra-fixed.c
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clk: tegra: Remove CLK_M_DIV fixed clocks
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2020-03-12 11:33:32 +01:00 |
clk-tegra-periph.c
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clk: tegra: Mark external clocks as not having reset control
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2021-05-31 15:16:46 +02:00 |
clk-tegra-super-cclk.c
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clk: tegra: cclk: Handle thermal DIV2 CPU frequency throttling
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2021-05-31 15:16:26 +02:00 |
clk-tegra-super-gen4.c
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clk: tegra: clk-super: Fix to enable PLLP branches to CPU
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2019-11-11 14:53:03 +01:00 |
clk-utils.c
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clk: tegra: Refactor fractional divider calculation
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2018-07-25 13:43:34 -07:00 |
clk.c
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clk: tegra: Fix double-free in tegra_clk_init()
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2019-12-24 00:01:06 -08:00 |
clk.h
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clk: tegra: Don't deassert reset on enabling clocks
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2021-05-31 15:16:46 +02:00 |
cvb.c
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clk: tegra: cvb: Provide missing description for 'tegra_cvb_add_opp_table()'s align param
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2021-02-11 11:56:05 -08:00 |
cvb.h
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treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
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2019-05-30 11:26:41 -07:00 |
Kconfig
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memory: tegra124-emc: Make driver modular
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2021-01-05 18:00:09 +01:00 |
Makefile
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memory: tegra124-emc: Make driver modular
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2021-01-05 18:00:09 +01:00 |