linux/drivers/clk/tegra
Dmitry Osipenko 2bcc025ab9 clk: tegra: Implement disable_unused() of tegra_clk_sdmmc_mux_ops
Implement disable_unused() callback of tegra_clk_sdmmc_mux_ops to fix
imbalanced disabling of the unused MMC clock on Tegra210 Jetson Nano.

Fixes: c592c8a28f ("clk: tegra: Fix refcounting of gate clocks")
Reported-by: Jon Hunter <jonathanh@nvidia.com> # T210 Nano
Tested-by: Jon Hunter <jonathanh@nvidia.com> # T210 Nano
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Link: https://lore.kernel.org/r/20210717112742.7196-1-digetx@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-07-27 14:54:19 -07:00
..
clk-audio-sync.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201 2019-05-30 11:29:52 -07:00
clk-bpmp.c clk: tegra: bpmp: Clamp clock rates on requests 2020-11-26 16:28:07 +01:00
clk-dfll.c clk: tegra: Do not return 0 on failure 2020-11-20 17:19:46 +01:00
clk-dfll.h clk: tegra: clk-dfll: Add suspend and resume support 2019-11-11 14:53:03 +01:00
clk-divider.c clk: tegra: divider: Check UART's divider enable-bit state on rate's recalculation 2020-01-10 15:50:05 +01:00
clk-id.h clk: tegra: Fix duplicated SE clock entry 2020-12-10 12:51:59 -08:00
clk-periph-fixed.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201 2019-05-30 11:29:52 -07:00
clk-periph-gate.c clk: tegra: Don't deassert reset on enabling clocks 2021-05-31 15:16:46 +02:00
clk-periph.c clk: tegra: Fix refcounting of gate clocks 2021-05-31 15:16:24 +02:00
clk-pll-out.c clk: tegra: pllout: Save and restore pllout context 2019-11-11 14:53:02 +01:00
clk-pll.c clk: tegra: Don't allow zero clock rate for PLLs 2021-05-31 15:16:26 +02:00
clk-sdmmc-mux.c clk: tegra: Implement disable_unused() of tegra_clk_sdmmc_mux_ops 2021-07-27 14:54:19 -07:00
clk-super.c clk: tegra: clk-super: Add restore-context support 2019-11-11 14:53:03 +01:00
clk-tegra20-emc.c clk: tegra: Export Tegra20 EMC kernel symbols 2020-11-06 19:24:04 +01:00
clk-tegra20.c clk: tegra: Halve SCLK rate on Tegra20 2021-05-31 15:16:25 +02:00
clk-tegra30.c clk: tegra: Don't deassert reset on enabling clocks 2021-05-31 15:16:46 +02:00
clk-tegra114.c clk: tegra: Remove audio clocks configuration from clock driver 2020-03-12 12:10:49 +01:00
clk-tegra124-dfll-fcpu.c clk: tegra: clk-tegra124-dfll-fcpu: don't use devm functions for regulator 2021-06-25 16:23:07 -07:00
clk-tegra124-emc.c clk: tegra: tegra124-emc: Fix clock imbalance in emc_set_timing() 2021-06-02 11:08:00 +02:00
clk-tegra124.c memory: tegra124-emc: Make driver modular 2021-01-05 18:00:09 +01:00
clk-tegra210-emc.c This pull request contains zero diff to the core framework. It is a collection 2020-10-22 12:53:28 -07:00
clk-tegra210.c clk: tegra: Add PLLE HW power sequencer control 2021-03-24 14:01:58 +01:00
clk-tegra-audio.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201 2019-05-30 11:29:52 -07:00
clk-tegra-fixed.c clk: tegra: Remove CLK_M_DIV fixed clocks 2020-03-12 11:33:32 +01:00
clk-tegra-periph.c clk: tegra: Mark external clocks as not having reset control 2021-05-31 15:16:46 +02:00
clk-tegra-super-cclk.c clk: tegra: cclk: Handle thermal DIV2 CPU frequency throttling 2021-05-31 15:16:26 +02:00
clk-tegra-super-gen4.c clk: tegra: clk-super: Fix to enable PLLP branches to CPU 2019-11-11 14:53:03 +01:00
clk-utils.c clk: tegra: Refactor fractional divider calculation 2018-07-25 13:43:34 -07:00
clk.c clk: tegra: Fix double-free in tegra_clk_init() 2019-12-24 00:01:06 -08:00
clk.h clk: tegra: Don't deassert reset on enabling clocks 2021-05-31 15:16:46 +02:00
cvb.c clk: tegra: cvb: Provide missing description for 'tegra_cvb_add_opp_table()'s align param 2021-02-11 11:56:05 -08:00
cvb.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174 2019-05-30 11:26:41 -07:00
Kconfig memory: tegra124-emc: Make driver modular 2021-01-05 18:00:09 +01:00
Makefile memory: tegra124-emc: Make driver modular 2021-01-05 18:00:09 +01:00