linux/drivers/thunderbolt/nhi.h
Greg Kroah-Hartman 3d41137801 thunderbolt: Changes for v5.11 merge window
This includes following Thunderbolt/USB4 changes for v5.11 merge window:
 
   * DMA traffic test driver
 
   * USB4 router NVM upgrade improvements
 
   * USB4 router operations proxy implementation available in the recent
     Intel Connection Manager firmwares
 
   * Support for Intel Maple Ridge discrete Thunderbolt 4 controller
 
   * A couple of cleanups and minor improvements.
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Merge tag 'thunderbolt-for-v5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/westeri/thunderbolt into usb-next

Mika writes:

thunderbolt: Changes for v5.11 merge window

This includes following Thunderbolt/USB4 changes for v5.11 merge window:

  * DMA traffic test driver

  * USB4 router NVM upgrade improvements

  * USB4 router operations proxy implementation available in the recent
    Intel Connection Manager firmwares

  * Support for Intel Maple Ridge discrete Thunderbolt 4 controller

  * A couple of cleanups and minor improvements.

* tag 'thunderbolt-for-v5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/westeri/thunderbolt: (22 commits)
  thunderbolt: Add support for Intel Maple Ridge
  thunderbolt: Add USB4 router operation proxy for firmware connection manager
  thunderbolt: Move constants for USB4 router operations to tb_regs.h
  thunderbolt: Add connection manager specific hooks for USB4 router operations
  thunderbolt: Pass TX and RX data directly to usb4_switch_op()
  thunderbolt: Pass metadata directly to usb4_switch_op()
  thunderbolt: Perform USB4 router NVM upgrade in two phases
  thunderbolt: Return -ENOTCONN when ERR_CONN is received
  thunderbolt: Keep the parent runtime resumed for a while on device disconnect
  thunderbolt: Log adapter numbers in decimal in path activation/deactivation
  thunderbolt: Log which connection manager implementation is used
  thunderbolt: Move max_boot_acl field to correct place in struct icm
  MAINTAINERS: Add Isaac as maintainer of Thunderbolt DMA traffic test driver
  thunderbolt: Add DMA traffic test driver
  thunderbolt: Add support for end-to-end flow control
  thunderbolt: Make it possible to allocate one directional DMA tunnel
  thunderbolt: Create debugfs directory automatically for services
  thunderbolt: Add functions for enabling and disabling lane bonding on XDomain
  thunderbolt: Add link_speed and link_width to XDomain
  thunderbolt: Create XDomain devices for loops back to the host
  ...
2020-12-08 13:41:45 +01:00

85 lines
2.8 KiB
C

/* SPDX-License-Identifier: GPL-2.0 */
/*
* Thunderbolt driver - NHI driver
*
* Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com>
* Copyright (C) 2018, Intel Corporation
*/
#ifndef DSL3510_H_
#define DSL3510_H_
#include <linux/thunderbolt.h>
enum nhi_fw_mode {
NHI_FW_SAFE_MODE,
NHI_FW_AUTH_MODE,
NHI_FW_EP_MODE,
NHI_FW_CM_MODE,
};
enum nhi_mailbox_cmd {
NHI_MAILBOX_SAVE_DEVS = 0x05,
NHI_MAILBOX_DISCONNECT_PCIE_PATHS = 0x06,
NHI_MAILBOX_DRV_UNLOADS = 0x07,
NHI_MAILBOX_DISCONNECT_PA = 0x10,
NHI_MAILBOX_DISCONNECT_PB = 0x11,
NHI_MAILBOX_ALLOW_ALL_DEVS = 0x23,
};
int nhi_mailbox_cmd(struct tb_nhi *nhi, enum nhi_mailbox_cmd cmd, u32 data);
enum nhi_fw_mode nhi_mailbox_mode(struct tb_nhi *nhi);
/**
* struct tb_nhi_ops - NHI specific optional operations
* @init: NHI specific initialization
* @suspend_noirq: NHI specific suspend_noirq hook
* @resume_noirq: NHI specific resume_noirq hook
* @runtime_suspend: NHI specific runtime_suspend hook
* @runtime_resume: NHI specific runtime_resume hook
* @shutdown: NHI specific shutdown
*/
struct tb_nhi_ops {
int (*init)(struct tb_nhi *nhi);
int (*suspend_noirq)(struct tb_nhi *nhi, bool wakeup);
int (*resume_noirq)(struct tb_nhi *nhi);
int (*runtime_suspend)(struct tb_nhi *nhi);
int (*runtime_resume)(struct tb_nhi *nhi);
void (*shutdown)(struct tb_nhi *nhi);
};
extern const struct tb_nhi_ops icl_nhi_ops;
/*
* PCI IDs used in this driver from Win Ridge forward. There is no
* need for the PCI quirk anymore as we will use ICM also on Apple
* hardware.
*/
#define PCI_DEVICE_ID_INTEL_MAPLE_RIDGE_4C_NHI 0x1137
#define PCI_DEVICE_ID_INTEL_WIN_RIDGE_2C_NHI 0x157d
#define PCI_DEVICE_ID_INTEL_WIN_RIDGE_2C_BRIDGE 0x157e
#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_NHI 0x15bf
#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_BRIDGE 0x15c0
#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_NHI 0x15d2
#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_BRIDGE 0x15d3
#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_NHI 0x15d9
#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_BRIDGE 0x15da
#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_USBONLY_NHI 0x15dc
#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_USBONLY_NHI 0x15dd
#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_USBONLY_NHI 0x15de
#define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_BRIDGE 0x15e7
#define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_NHI 0x15e8
#define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_BRIDGE 0x15ea
#define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_NHI 0x15eb
#define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_BRIDGE 0x15ef
#define PCI_DEVICE_ID_INTEL_ICL_NHI1 0x8a0d
#define PCI_DEVICE_ID_INTEL_ICL_NHI0 0x8a17
#define PCI_DEVICE_ID_INTEL_TGL_NHI0 0x9a1b
#define PCI_DEVICE_ID_INTEL_TGL_NHI1 0x9a1d
#define PCI_DEVICE_ID_INTEL_TGL_H_NHI0 0x9a1f
#define PCI_DEVICE_ID_INTEL_TGL_H_NHI1 0x9a21
#define PCI_CLASS_SERIAL_USB_USB4 0x0c0340
#endif