linux/arch/riscv
Alexandre Ghiti 28252e0864
riscv: Remove 32b kernel mapping from page table dump
The 32b kernel mapping lies in the linear mapping, there is no point in
printing its address in page table dump, so remove this leftover that
comes from moving the kernel mapping outside the linear mapping for 64b
kernel.

Fixes: e9efb21fe352 ("riscv: Prepare ptdump for vm layout dynamic addresses")
Signed-off-by: Alexandre Ghiti <alex@ghiti.fr>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2021-05-01 08:53:32 -07:00
..
boot RISC-V: Initial DTS for Microchip ICICLE board 2021-04-26 08:31:31 -07:00
configs RISC-V: Enable Microchip PolarFire ICICLE SoC 2021-04-26 08:31:32 -07:00
errata riscv: sifive: Apply errata "cip-1200" patch 2021-04-26 08:24:58 -07:00
include riscv: Fix 32b kernel build with CONFIG_DEBUG_VIRTUAL=y 2021-05-01 08:53:31 -07:00
kernel RISC-V: Fix error code returned by riscv_hartid_to_cpuid() 2021-05-01 08:53:19 -07:00
lib riscv: Add support for function error injection 2021-01-14 15:09:09 -08:00
mm riscv: Remove 32b kernel mapping from page table dump 2021-05-01 08:53:32 -07:00
net riscv: bpf: Avoid breaking W^X 2021-04-26 08:25:14 -07:00
Kbuild riscv: Allow device trees to be built into the kernel 2020-05-18 11:38:05 -07:00
Kconfig RISC-V: enable XIP 2021-04-26 08:31:28 -07:00
Kconfig.debug RISC-V: Remove EARLY_PRINTK support 2018-12-17 10:23:46 -08:00
Kconfig.erratas riscv: sifive: Apply errata "cip-1200" patch 2021-04-26 08:24:58 -07:00
Kconfig.socs RISC-V: Add Microchip PolarFire SoC kconfig option 2021-04-26 08:31:29 -07:00
Makefile RISC-V: enable XIP 2021-04-26 08:31:28 -07:00