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8799ee9f49
On some CPUs, bit 4 of section mappings means "update the cache when written to". On others, this bit is required to be one, and others it's required to be zero. Finally, on ARMv6 and above, setting it turns on "no execute" and prevents speculative prefetches. With all these combinations, no one value fits all CPUs, so we have to pick a value depending on the CPU type, and the area we're mapping. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
112 lines
4.4 KiB
C
112 lines
4.4 KiB
C
/*
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* Copyright (C) 1995-2003 Russell King
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* 2001-2002 Keith Owens
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*
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* Generate definitions needed by assembly language modules.
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* This code generates raw asm output which is post-processed to extract
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* and format the required data.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/sched.h>
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#include <linux/mm.h>
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#include <asm/mach/arch.h>
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#include <asm/thread_info.h>
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#include <asm/memory.h>
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/*
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* Make sure that the compiler and target are compatible.
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*/
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#if defined(__APCS_26__)
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#error Sorry, your compiler targets APCS-26 but this kernel requires APCS-32
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#endif
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/*
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* GCC 3.0, 3.1: general bad code generation.
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* GCC 3.2.0: incorrect function argument offset calculation.
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* GCC 3.2.x: miscompiles NEW_AUX_ENT in fs/binfmt_elf.c
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* (http://gcc.gnu.org/PR8896) and incorrect structure
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* initialisation in fs/jffs2/erase.c
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*/
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#if (__GNUC__ == 3 && __GNUC_MINOR__ < 3)
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#error Your compiler is too buggy; it is known to miscompile kernels.
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#error Known good compilers: 3.3
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#endif
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/* Use marker if you need to separate the values later */
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#define DEFINE(sym, val) \
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asm volatile("\n->" #sym " %0 " #val : : "i" (val))
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#define BLANK() asm volatile("\n->" : : )
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int main(void)
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{
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DEFINE(TSK_ACTIVE_MM, offsetof(struct task_struct, active_mm));
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BLANK();
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DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
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DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
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DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit));
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DEFINE(TI_TASK, offsetof(struct thread_info, task));
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DEFINE(TI_EXEC_DOMAIN, offsetof(struct thread_info, exec_domain));
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DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
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DEFINE(TI_CPU_DOMAIN, offsetof(struct thread_info, cpu_domain));
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DEFINE(TI_CPU_SAVE, offsetof(struct thread_info, cpu_context));
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DEFINE(TI_USED_CP, offsetof(struct thread_info, used_cp));
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DEFINE(TI_TP_VALUE, offsetof(struct thread_info, tp_value));
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DEFINE(TI_FPSTATE, offsetof(struct thread_info, fpstate));
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DEFINE(TI_VFPSTATE, offsetof(struct thread_info, vfpstate));
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#ifdef CONFIG_IWMMXT
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DEFINE(TI_IWMMXT_STATE, offsetof(struct thread_info, fpstate.iwmmxt));
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#endif
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#ifdef CONFIG_CRUNCH
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DEFINE(TI_CRUNCH_STATE, offsetof(struct thread_info, crunchstate));
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#endif
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BLANK();
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DEFINE(S_R0, offsetof(struct pt_regs, ARM_r0));
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DEFINE(S_R1, offsetof(struct pt_regs, ARM_r1));
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DEFINE(S_R2, offsetof(struct pt_regs, ARM_r2));
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DEFINE(S_R3, offsetof(struct pt_regs, ARM_r3));
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DEFINE(S_R4, offsetof(struct pt_regs, ARM_r4));
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DEFINE(S_R5, offsetof(struct pt_regs, ARM_r5));
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DEFINE(S_R6, offsetof(struct pt_regs, ARM_r6));
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DEFINE(S_R7, offsetof(struct pt_regs, ARM_r7));
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DEFINE(S_R8, offsetof(struct pt_regs, ARM_r8));
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DEFINE(S_R9, offsetof(struct pt_regs, ARM_r9));
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DEFINE(S_R10, offsetof(struct pt_regs, ARM_r10));
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DEFINE(S_FP, offsetof(struct pt_regs, ARM_fp));
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DEFINE(S_IP, offsetof(struct pt_regs, ARM_ip));
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DEFINE(S_SP, offsetof(struct pt_regs, ARM_sp));
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DEFINE(S_LR, offsetof(struct pt_regs, ARM_lr));
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DEFINE(S_PC, offsetof(struct pt_regs, ARM_pc));
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DEFINE(S_PSR, offsetof(struct pt_regs, ARM_cpsr));
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DEFINE(S_OLD_R0, offsetof(struct pt_regs, ARM_ORIG_r0));
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DEFINE(S_FRAME_SIZE, sizeof(struct pt_regs));
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BLANK();
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#if __LINUX_ARM_ARCH__ >= 6
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DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id));
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BLANK();
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#endif
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DEFINE(VMA_VM_MM, offsetof(struct vm_area_struct, vm_mm));
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DEFINE(VMA_VM_FLAGS, offsetof(struct vm_area_struct, vm_flags));
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BLANK();
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DEFINE(VM_EXEC, VM_EXEC);
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BLANK();
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DEFINE(PAGE_SZ, PAGE_SIZE);
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BLANK();
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DEFINE(SYS_ERROR0, 0x9f0000);
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BLANK();
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DEFINE(SIZEOF_MACHINE_DESC, sizeof(struct machine_desc));
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DEFINE(MACHINFO_TYPE, offsetof(struct machine_desc, nr));
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DEFINE(MACHINFO_NAME, offsetof(struct machine_desc, name));
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DEFINE(MACHINFO_PHYSIO, offsetof(struct machine_desc, phys_io));
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DEFINE(MACHINFO_PGOFFIO, offsetof(struct machine_desc, io_pg_offst));
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BLANK();
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DEFINE(PROC_INFO_SZ, sizeof(struct proc_info_list));
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DEFINE(PROCINFO_INITFUNC, offsetof(struct proc_info_list, __cpu_flush));
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DEFINE(PROCINFO_MM_MMUFLAGS, offsetof(struct proc_info_list, __cpu_mm_mmu_flags));
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DEFINE(PROCINFO_IO_MMUFLAGS, offsetof(struct proc_info_list, __cpu_io_mmu_flags));
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return 0;
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}
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