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cff2f741b8
Here's the large driver core updates for 3.8-rc1. The biggest thing here is the various __dev* marking removals. This is going to be a pain for the merge with different subsystem trees, I know, but all of the patches included here have been ACKed by their various subsystem maintainers, as they wanted them to go through here. If this is too much of a pain, I can pull all of them out of this tree and just send you one with the other fixes/updates and then, after 3.8-rc1 is out, do the rest of the removals to ensure we catch them all, it's up to you. The merges should all be trivial, and Stephen has been doing them all in linux-next for a few weeks now quite easily. Other than the __dev* marking removals, there's nothing major here, some firmware loading updates and other minor things in the driver core. All of these have (much to Stephen's annoyance), been in linux-next for a while. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.19 (GNU/Linux) iEYEABECAAYFAlDHkPkACgkQMUfUDdst+ykaWgCfW7AM30cv0nzoVO08ax6KjlG1 KVYAn3z/KYazvp4B6LMvrW9y0G34Wmad =yvVr -----END PGP SIGNATURE----- Merge tag 'driver-core-3.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core Pull driver core updates from Greg Kroah-Hartman: "Here's the large driver core updates for 3.8-rc1. The biggest thing here is the various __dev* marking removals. This is going to be a pain for the merge with different subsystem trees, I know, but all of the patches included here have been ACKed by their various subsystem maintainers, as they wanted them to go through here. If this is too much of a pain, I can pull all of them out of this tree and just send you one with the other fixes/updates and then, after 3.8-rc1 is out, do the rest of the removals to ensure we catch them all, it's up to you. The merges should all be trivial, and Stephen has been doing them all in linux-next for a few weeks now quite easily. Other than the __dev* marking removals, there's nothing major here, some firmware loading updates and other minor things in the driver core. All of these have (much to Stephen's annoyance), been in linux-next for a while. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>" Fixed up trivial conflicts in drivers/gpio/gpio-{em,stmpe}.c due to gpio update. * tag 'driver-core-3.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (93 commits) modpost.c: Stop checking __dev* section mismatches init.h: Remove __dev* sections from the kernel acpi: remove use of __devinit PCI: Remove __dev* markings PCI: Always build setup-bus when PCI is enabled PCI: Move pci_uevent into pci-driver.c PCI: Remove CONFIG_HOTPLUG ifdefs unicore32/PCI: Remove CONFIG_HOTPLUG ifdefs sh/PCI: Remove CONFIG_HOTPLUG ifdefs powerpc/PCI: Remove CONFIG_HOTPLUG ifdefs mips/PCI: Remove CONFIG_HOTPLUG ifdefs microblaze/PCI: Remove CONFIG_HOTPLUG ifdefs dma: remove use of __devinit dma: remove use of __devexit_p firewire: remove use of __devinitdata firewire: remove use of __devinit leds: remove use of __devexit leds: remove use of __devinit leds: remove use of __devexit_p mmc: remove use of __devexit ...
319 lines
8.4 KiB
C
319 lines
8.4 KiB
C
/* drivers/gpio/gpio-vt8500.c
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*
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* Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
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* Based on arch/arm/mach-vt8500/gpio.c:
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* - Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/module.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/gpio.h>
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#include <linux/platform_device.h>
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#include <linux/bitops.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/of_device.h>
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/*
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We handle GPIOs by bank, each bank containing up to 32 GPIOs covered
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by one set of registers (although not all may be valid).
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Because different SoC's have different register offsets, we pass the
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register offsets as data in vt8500_gpio_dt_ids[].
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A value of NO_REG is used to indicate that this register is not
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supported. Only used for ->en at the moment.
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*/
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#define NO_REG 0xFFFF
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/*
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* struct vt8500_gpio_bank_regoffsets
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* @en: offset to enable register of the bank
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* @dir: offset to direction register of the bank
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* @data_out: offset to the data out register of the bank
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* @data_in: offset to the data in register of the bank
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* @ngpio: highest valid pin in this bank
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*/
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struct vt8500_gpio_bank_regoffsets {
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unsigned int en;
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unsigned int dir;
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unsigned int data_out;
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unsigned int data_in;
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unsigned char ngpio;
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};
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struct vt8500_gpio_data {
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unsigned int num_banks;
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struct vt8500_gpio_bank_regoffsets banks[];
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};
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#define VT8500_BANK(__en, __dir, __out, __in, __ngpio) \
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{ \
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.en = __en, \
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.dir = __dir, \
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.data_out = __out, \
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.data_in = __in, \
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.ngpio = __ngpio, \
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}
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static struct vt8500_gpio_data vt8500_data = {
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.num_banks = 7,
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.banks = {
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VT8500_BANK(0x00, 0x20, 0x40, 0x60, 26),
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VT8500_BANK(0x04, 0x24, 0x44, 0x64, 28),
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VT8500_BANK(0x08, 0x28, 0x48, 0x68, 31),
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VT8500_BANK(0x0C, 0x2C, 0x4C, 0x6C, 19),
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VT8500_BANK(0x10, 0x30, 0x50, 0x70, 19),
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VT8500_BANK(0x14, 0x34, 0x54, 0x74, 23),
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VT8500_BANK(NO_REG, 0x3C, 0x5C, 0x7C, 9),
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},
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};
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static struct vt8500_gpio_data wm8505_data = {
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.num_banks = 10,
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.banks = {
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VT8500_BANK(0x40, 0x68, 0x90, 0xB8, 8),
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VT8500_BANK(0x44, 0x6C, 0x94, 0xBC, 32),
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VT8500_BANK(0x48, 0x70, 0x98, 0xC0, 6),
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VT8500_BANK(0x4C, 0x74, 0x9C, 0xC4, 16),
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VT8500_BANK(0x50, 0x78, 0xA0, 0xC8, 25),
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VT8500_BANK(0x54, 0x7C, 0xA4, 0xCC, 5),
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VT8500_BANK(0x58, 0x80, 0xA8, 0xD0, 5),
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VT8500_BANK(0x5C, 0x84, 0xAC, 0xD4, 12),
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VT8500_BANK(0x60, 0x88, 0xB0, 0xD8, 16),
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VT8500_BANK(0x64, 0x8C, 0xB4, 0xDC, 22),
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VT8500_BANK(0x500, 0x504, 0x508, 0x50C, 6),
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},
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};
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/*
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* No information about which bits are valid so we just make
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* them all available until its figured out.
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*/
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static struct vt8500_gpio_data wm8650_data = {
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.num_banks = 9,
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.banks = {
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VT8500_BANK(0x40, 0x80, 0xC0, 0x00, 32),
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VT8500_BANK(0x44, 0x84, 0xC4, 0x04, 32),
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VT8500_BANK(0x48, 0x88, 0xC8, 0x08, 32),
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VT8500_BANK(0x4C, 0x8C, 0xCC, 0x0C, 32),
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VT8500_BANK(0x50, 0x90, 0xD0, 0x10, 32),
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VT8500_BANK(0x54, 0x94, 0xD4, 0x14, 32),
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VT8500_BANK(0x58, 0x98, 0xD8, 0x18, 32),
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VT8500_BANK(0x5C, 0x9C, 0xDC, 0x1C, 32),
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VT8500_BANK(0x7C, 0xBC, 0xFC, 0x3C, 32),
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VT8500_BANK(0x500, 0x504, 0x508, 0x50C, 6),
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},
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};
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struct vt8500_gpio_chip {
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struct gpio_chip chip;
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const struct vt8500_gpio_bank_regoffsets *regs;
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void __iomem *base;
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};
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#define to_vt8500(__chip) container_of(__chip, struct vt8500_gpio_chip, chip)
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static int vt8500_gpio_request(struct gpio_chip *chip, unsigned offset)
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{
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u32 val;
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struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip);
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if (vt8500_chip->regs->en == NO_REG)
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return 0;
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val = readl_relaxed(vt8500_chip->base + vt8500_chip->regs->en);
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val |= BIT(offset);
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writel_relaxed(val, vt8500_chip->base + vt8500_chip->regs->en);
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return 0;
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}
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static void vt8500_gpio_free(struct gpio_chip *chip, unsigned offset)
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{
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struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip);
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u32 val;
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if (vt8500_chip->regs->en == NO_REG)
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return;
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val = readl_relaxed(vt8500_chip->base + vt8500_chip->regs->en);
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val &= ~BIT(offset);
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writel_relaxed(val, vt8500_chip->base + vt8500_chip->regs->en);
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}
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static int vt8500_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
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{
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struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip);
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u32 val = readl_relaxed(vt8500_chip->base + vt8500_chip->regs->dir);
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val &= ~BIT(offset);
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writel_relaxed(val, vt8500_chip->base + vt8500_chip->regs->dir);
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return 0;
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}
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static int vt8500_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
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int value)
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{
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struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip);
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u32 val = readl_relaxed(vt8500_chip->base + vt8500_chip->regs->dir);
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val |= BIT(offset);
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writel_relaxed(val, vt8500_chip->base + vt8500_chip->regs->dir);
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if (value) {
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val = readl_relaxed(vt8500_chip->base +
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vt8500_chip->regs->data_out);
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val |= BIT(offset);
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writel_relaxed(val, vt8500_chip->base +
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vt8500_chip->regs->data_out);
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}
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return 0;
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}
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static int vt8500_gpio_get_value(struct gpio_chip *chip, unsigned offset)
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{
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struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip);
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return (readl_relaxed(vt8500_chip->base + vt8500_chip->regs->data_in) >>
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offset) & 1;
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}
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static void vt8500_gpio_set_value(struct gpio_chip *chip, unsigned offset,
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int value)
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{
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struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip);
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u32 val = readl_relaxed(vt8500_chip->base +
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vt8500_chip->regs->data_out);
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if (value)
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val |= BIT(offset);
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else
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val &= ~BIT(offset);
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writel_relaxed(val, vt8500_chip->base + vt8500_chip->regs->data_out);
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}
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static int vt8500_of_xlate(struct gpio_chip *gc,
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const struct of_phandle_args *gpiospec, u32 *flags)
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{
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/* bank if specificed in gpiospec->args[0] */
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if (flags)
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*flags = gpiospec->args[2];
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return gpiospec->args[1];
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}
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static int vt8500_add_chips(struct platform_device *pdev, void __iomem *base,
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const struct vt8500_gpio_data *data)
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{
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struct vt8500_gpio_chip *vtchip;
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struct gpio_chip *chip;
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int i;
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int pin_cnt = 0;
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vtchip = devm_kzalloc(&pdev->dev,
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sizeof(struct vt8500_gpio_chip) * data->num_banks,
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GFP_KERNEL);
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if (!vtchip) {
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pr_err("%s: failed to allocate chip memory\n", __func__);
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return -ENOMEM;
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}
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for (i = 0; i < data->num_banks; i++) {
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vtchip[i].base = base;
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vtchip[i].regs = &data->banks[i];
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chip = &vtchip[i].chip;
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chip->of_xlate = vt8500_of_xlate;
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chip->of_gpio_n_cells = 3;
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chip->of_node = pdev->dev.of_node;
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chip->request = vt8500_gpio_request;
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chip->free = vt8500_gpio_free;
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chip->direction_input = vt8500_gpio_direction_input;
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chip->direction_output = vt8500_gpio_direction_output;
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chip->get = vt8500_gpio_get_value;
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chip->set = vt8500_gpio_set_value;
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chip->can_sleep = 0;
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chip->base = pin_cnt;
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chip->ngpio = data->banks[i].ngpio;
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pin_cnt += data->banks[i].ngpio;
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gpiochip_add(chip);
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}
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return 0;
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}
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static struct of_device_id vt8500_gpio_dt_ids[] = {
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{ .compatible = "via,vt8500-gpio", .data = &vt8500_data, },
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{ .compatible = "wm,wm8505-gpio", .data = &wm8505_data, },
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{ .compatible = "wm,wm8650-gpio", .data = &wm8650_data, },
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{ /* Sentinel */ },
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};
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static int vt8500_gpio_probe(struct platform_device *pdev)
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{
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void __iomem *gpio_base;
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struct device_node *np;
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const struct of_device_id *of_id =
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of_match_device(vt8500_gpio_dt_ids, &pdev->dev);
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if (!of_id) {
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dev_err(&pdev->dev, "Failed to find gpio controller\n");
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return -ENODEV;
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}
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np = pdev->dev.of_node;
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if (!np) {
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dev_err(&pdev->dev, "Missing GPIO description in devicetree\n");
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return -EFAULT;
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}
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gpio_base = of_iomap(np, 0);
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if (!gpio_base) {
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dev_err(&pdev->dev, "Unable to map GPIO registers\n");
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of_node_put(np);
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return -ENOMEM;
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}
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vt8500_add_chips(pdev, gpio_base, of_id->data);
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return 0;
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}
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static struct platform_driver vt8500_gpio_driver = {
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.probe = vt8500_gpio_probe,
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.driver = {
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.name = "vt8500-gpio",
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.owner = THIS_MODULE,
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.of_match_table = vt8500_gpio_dt_ids,
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},
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};
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module_platform_driver(vt8500_gpio_driver);
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MODULE_DESCRIPTION("VT8500 GPIO Driver");
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MODULE_AUTHOR("Tony Prisk <linux@prisktech.co.nz>");
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MODULE_LICENSE("GPL v2");
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MODULE_DEVICE_TABLE(of, vt8500_gpio_dt_ids);
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