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c9bd5e690a
This code sequence is unsafe in modules: static u64 mask = DMA_BIT_MASK(something); ... if (!dev->dma_mask) dev->dma_mask = &mask; as if a module is reloaded, the mask will be pointing at the original module's mask address, and this can lead to oopses. Moreover, they all follow this with: if (!dev->coherent_dma_mask) dev->coherent_dma_mask = mask; where 'mask' is the same value as the statically defined mask, and this bypasses the architecture's check on whether the DMA mask is possible. Fix these issues by using the new dma_coerce_coherent_and_mask() function. Acked-by: Mark Brown <broonie@linaro.org> Acked-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
448 lines
9.9 KiB
C
448 lines
9.9 KiB
C
/*
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* sound/soc/samsung/idma.c
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*
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* Copyright (c) 2011 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* I2S0's Internal DMA driver
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <linux/slab.h>
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#include <linux/module.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include "i2s.h"
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#include "idma.h"
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#include "dma.h"
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#include "i2s-regs.h"
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#define ST_RUNNING (1<<0)
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#define ST_OPENED (1<<1)
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static const struct snd_pcm_hardware idma_hardware = {
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.info = SNDRV_PCM_INFO_INTERLEAVED |
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SNDRV_PCM_INFO_BLOCK_TRANSFER |
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SNDRV_PCM_INFO_MMAP |
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SNDRV_PCM_INFO_MMAP_VALID |
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SNDRV_PCM_INFO_PAUSE |
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SNDRV_PCM_INFO_RESUME,
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.formats = SNDRV_PCM_FMTBIT_S16_LE |
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SNDRV_PCM_FMTBIT_U16_LE |
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SNDRV_PCM_FMTBIT_S24_LE |
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SNDRV_PCM_FMTBIT_U24_LE |
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SNDRV_PCM_FMTBIT_U8 |
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SNDRV_PCM_FMTBIT_S8,
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.channels_min = 2,
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.channels_max = 2,
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.buffer_bytes_max = MAX_IDMA_BUFFER,
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.period_bytes_min = 128,
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.period_bytes_max = MAX_IDMA_PERIOD,
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.periods_min = 1,
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.periods_max = 2,
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};
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struct idma_ctrl {
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spinlock_t lock;
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int state;
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dma_addr_t start;
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dma_addr_t pos;
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dma_addr_t end;
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dma_addr_t period;
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dma_addr_t periodsz;
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void *token;
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void (*cb)(void *dt, int bytes_xfer);
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};
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static struct idma_info {
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spinlock_t lock;
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void __iomem *regs;
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dma_addr_t lp_tx_addr;
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} idma;
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static int idma_irq;
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static void idma_getpos(dma_addr_t *src)
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{
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*src = idma.lp_tx_addr +
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(readl(idma.regs + I2STRNCNT) & 0xffffff) * 4;
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}
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static int idma_enqueue(struct snd_pcm_substream *substream)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct idma_ctrl *prtd = substream->runtime->private_data;
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u32 val;
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spin_lock(&prtd->lock);
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prtd->token = (void *) substream;
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spin_unlock(&prtd->lock);
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/* Internal DMA Level0 Interrupt Address */
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val = idma.lp_tx_addr + prtd->periodsz;
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writel(val, idma.regs + I2SLVL0ADDR);
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/* Start address0 of I2S internal DMA operation. */
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val = idma.lp_tx_addr;
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writel(val, idma.regs + I2SSTR0);
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/*
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* Transfer block size for I2S internal DMA.
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* Should decide transfer size before start dma operation
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*/
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val = readl(idma.regs + I2SSIZE);
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val &= ~(I2SSIZE_TRNMSK << I2SSIZE_SHIFT);
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val |= (((runtime->dma_bytes >> 2) &
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I2SSIZE_TRNMSK) << I2SSIZE_SHIFT);
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writel(val, idma.regs + I2SSIZE);
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val = readl(idma.regs + I2SAHB);
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val |= AHB_INTENLVL0;
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writel(val, idma.regs + I2SAHB);
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return 0;
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}
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static void idma_setcallbk(struct snd_pcm_substream *substream,
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void (*cb)(void *, int))
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{
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struct idma_ctrl *prtd = substream->runtime->private_data;
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spin_lock(&prtd->lock);
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prtd->cb = cb;
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spin_unlock(&prtd->lock);
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}
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static void idma_control(int op)
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{
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u32 val = readl(idma.regs + I2SAHB);
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spin_lock(&idma.lock);
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switch (op) {
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case LPAM_DMA_START:
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val |= (AHB_INTENLVL0 | AHB_DMAEN);
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break;
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case LPAM_DMA_STOP:
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val &= ~(AHB_INTENLVL0 | AHB_DMAEN);
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break;
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default:
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spin_unlock(&idma.lock);
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return;
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}
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writel(val, idma.regs + I2SAHB);
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spin_unlock(&idma.lock);
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}
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static void idma_done(void *id, int bytes_xfer)
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{
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struct snd_pcm_substream *substream = id;
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struct idma_ctrl *prtd = substream->runtime->private_data;
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if (prtd && (prtd->state & ST_RUNNING))
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snd_pcm_period_elapsed(substream);
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}
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static int idma_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct idma_ctrl *prtd = substream->runtime->private_data;
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u32 mod = readl(idma.regs + I2SMOD);
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u32 ahb = readl(idma.regs + I2SAHB);
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ahb |= (AHB_DMARLD | AHB_INTMASK);
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mod |= MOD_TXS_IDMA;
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writel(ahb, idma.regs + I2SAHB);
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writel(mod, idma.regs + I2SMOD);
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snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
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runtime->dma_bytes = params_buffer_bytes(params);
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prtd->start = prtd->pos = runtime->dma_addr;
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prtd->period = params_periods(params);
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prtd->periodsz = params_period_bytes(params);
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prtd->end = runtime->dma_addr + runtime->dma_bytes;
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idma_setcallbk(substream, idma_done);
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return 0;
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}
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static int idma_hw_free(struct snd_pcm_substream *substream)
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{
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snd_pcm_set_runtime_buffer(substream, NULL);
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return 0;
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}
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static int idma_prepare(struct snd_pcm_substream *substream)
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{
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struct idma_ctrl *prtd = substream->runtime->private_data;
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prtd->pos = prtd->start;
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/* flush the DMA channel */
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idma_control(LPAM_DMA_STOP);
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idma_enqueue(substream);
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return 0;
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}
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static int idma_trigger(struct snd_pcm_substream *substream, int cmd)
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{
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struct idma_ctrl *prtd = substream->runtime->private_data;
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int ret = 0;
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spin_lock(&prtd->lock);
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_RESUME:
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case SNDRV_PCM_TRIGGER_START:
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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prtd->state |= ST_RUNNING;
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idma_control(LPAM_DMA_START);
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break;
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case SNDRV_PCM_TRIGGER_SUSPEND:
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case SNDRV_PCM_TRIGGER_STOP:
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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prtd->state &= ~ST_RUNNING;
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idma_control(LPAM_DMA_STOP);
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break;
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default:
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ret = -EINVAL;
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break;
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}
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spin_unlock(&prtd->lock);
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return ret;
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}
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static snd_pcm_uframes_t
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idma_pointer(struct snd_pcm_substream *substream)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct idma_ctrl *prtd = runtime->private_data;
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dma_addr_t src;
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unsigned long res;
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spin_lock(&prtd->lock);
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idma_getpos(&src);
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res = src - prtd->start;
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spin_unlock(&prtd->lock);
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return bytes_to_frames(substream->runtime, res);
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}
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static int idma_mmap(struct snd_pcm_substream *substream,
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struct vm_area_struct *vma)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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unsigned long size, offset;
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int ret;
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/* From snd_pcm_lib_mmap_iomem */
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vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
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size = vma->vm_end - vma->vm_start;
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offset = vma->vm_pgoff << PAGE_SHIFT;
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ret = io_remap_pfn_range(vma, vma->vm_start,
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(runtime->dma_addr + offset) >> PAGE_SHIFT,
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size, vma->vm_page_prot);
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return ret;
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}
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static irqreturn_t iis_irq(int irqno, void *dev_id)
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{
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struct idma_ctrl *prtd = (struct idma_ctrl *)dev_id;
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u32 iiscon, iisahb, val, addr;
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iisahb = readl(idma.regs + I2SAHB);
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iiscon = readl(idma.regs + I2SCON);
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val = (iisahb & AHB_LVL0INT) ? AHB_CLRLVL0INT : 0;
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if (val) {
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iisahb |= val;
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writel(iisahb, idma.regs + I2SAHB);
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addr = readl(idma.regs + I2SLVL0ADDR) - idma.lp_tx_addr;
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addr += prtd->periodsz;
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addr %= (prtd->end - prtd->start);
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addr += idma.lp_tx_addr;
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writel(addr, idma.regs + I2SLVL0ADDR);
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if (prtd->cb)
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prtd->cb(prtd->token, prtd->period);
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}
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return IRQ_HANDLED;
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}
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static int idma_open(struct snd_pcm_substream *substream)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct idma_ctrl *prtd;
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int ret;
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snd_soc_set_runtime_hwparams(substream, &idma_hardware);
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prtd = kzalloc(sizeof(struct idma_ctrl), GFP_KERNEL);
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if (prtd == NULL)
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return -ENOMEM;
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ret = request_irq(idma_irq, iis_irq, 0, "i2s", prtd);
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if (ret < 0) {
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pr_err("fail to claim i2s irq , ret = %d\n", ret);
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kfree(prtd);
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return ret;
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}
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spin_lock_init(&prtd->lock);
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runtime->private_data = prtd;
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return 0;
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}
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static int idma_close(struct snd_pcm_substream *substream)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct idma_ctrl *prtd = runtime->private_data;
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free_irq(idma_irq, prtd);
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if (!prtd)
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pr_err("idma_close called with prtd == NULL\n");
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kfree(prtd);
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return 0;
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}
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static struct snd_pcm_ops idma_ops = {
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.open = idma_open,
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.close = idma_close,
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.ioctl = snd_pcm_lib_ioctl,
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.trigger = idma_trigger,
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.pointer = idma_pointer,
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.mmap = idma_mmap,
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.hw_params = idma_hw_params,
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.hw_free = idma_hw_free,
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.prepare = idma_prepare,
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};
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static void idma_free(struct snd_pcm *pcm)
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{
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struct snd_pcm_substream *substream;
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struct snd_dma_buffer *buf;
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substream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
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if (!substream)
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return;
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buf = &substream->dma_buffer;
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if (!buf->area)
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return;
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iounmap(buf->area);
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buf->area = NULL;
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buf->addr = 0;
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}
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static int preallocate_idma_buffer(struct snd_pcm *pcm, int stream)
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{
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struct snd_pcm_substream *substream = pcm->streams[stream].substream;
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struct snd_dma_buffer *buf = &substream->dma_buffer;
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buf->dev.dev = pcm->card->dev;
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buf->private_data = NULL;
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/* Assign PCM buffer pointers */
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buf->dev.type = SNDRV_DMA_TYPE_CONTINUOUS;
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buf->addr = idma.lp_tx_addr;
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buf->bytes = idma_hardware.buffer_bytes_max;
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buf->area = (unsigned char *)ioremap(buf->addr, buf->bytes);
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return 0;
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}
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static int idma_new(struct snd_soc_pcm_runtime *rtd)
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{
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struct snd_card *card = rtd->card->snd_card;
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struct snd_pcm *pcm = rtd->pcm;
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int ret;
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ret = dma_coerce_mask_and_coherent(card->dev, DMA_BIT_MASK(32));
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if (ret)
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return ret;
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if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
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ret = preallocate_idma_buffer(pcm,
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SNDRV_PCM_STREAM_PLAYBACK);
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}
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return ret;
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}
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void idma_reg_addr_init(void __iomem *regs, dma_addr_t addr)
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{
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spin_lock_init(&idma.lock);
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idma.regs = regs;
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idma.lp_tx_addr = addr;
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}
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EXPORT_SYMBOL_GPL(idma_reg_addr_init);
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static struct snd_soc_platform_driver asoc_idma_platform = {
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.ops = &idma_ops,
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.pcm_new = idma_new,
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.pcm_free = idma_free,
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};
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static int asoc_idma_platform_probe(struct platform_device *pdev)
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{
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idma_irq = platform_get_irq(pdev, 0);
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if (idma_irq < 0)
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return idma_irq;
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return snd_soc_register_platform(&pdev->dev, &asoc_idma_platform);
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}
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static int asoc_idma_platform_remove(struct platform_device *pdev)
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{
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snd_soc_unregister_platform(&pdev->dev);
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return 0;
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}
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static struct platform_driver asoc_idma_driver = {
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.driver = {
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.name = "samsung-idma",
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.owner = THIS_MODULE,
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},
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.probe = asoc_idma_platform_probe,
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.remove = asoc_idma_platform_remove,
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};
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module_platform_driver(asoc_idma_driver);
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MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
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MODULE_DESCRIPTION("Samsung ASoC IDMA Driver");
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MODULE_LICENSE("GPL");
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