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102a3375e6
Add missing documentation for "dmas" and "dma-names" properties that can be used on i2c-stm32. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Reviewed-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
66 lines
2.3 KiB
Plaintext
66 lines
2.3 KiB
Plaintext
* I2C controller embedded in STMicroelectronics STM32 I2C platform
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Required properties:
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- compatible: Must be one of the following
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- "st,stm32f4-i2c"
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- "st,stm32f7-i2c"
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- reg: Offset and length of the register set for the device
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- interrupts: Must contain the interrupt id for I2C event and then the
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interrupt id for I2C error.
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- resets: Must contain the phandle to the reset controller.
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- clocks: Must contain the input clock of the I2C instance.
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- A pinctrl state named "default" must be defined to set pins in mode of
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operation for I2C transfer
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- #address-cells = <1>;
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- #size-cells = <0>;
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Optional properties:
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- clock-frequency: Desired I2C bus clock frequency in Hz. If not specified,
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the default 100 kHz frequency will be used.
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For STM32F4 SoC Standard-mode and Fast-mode are supported, possible values are
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100000 and 400000.
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For STM32F7, STM32H7 and STM32MP1 SoCs, Standard-mode, Fast-mode and Fast-mode
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Plus are supported, possible values are 100000, 400000 and 1000000.
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- dmas: List of phandles to rx and tx DMA channels. Refer to stm32-dma.txt.
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- dma-names: List of dma names. Valid names are: "rx" and "tx".
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- i2c-scl-rising-time-ns: I2C SCL Rising time for the board (default: 25)
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For STM32F7, STM32H7 and STM32MP1 only.
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- i2c-scl-falling-time-ns: I2C SCL Falling time for the board (default: 10)
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For STM32F7, STM32H7 and STM32MP1 only.
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I2C Timings are derived from these 2 values
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- st,syscfg-fmp: Use to set Fast Mode Plus bit within SYSCFG when Fast Mode
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Plus speed is selected by slave.
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1st cell: phandle to syscfg
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2nd cell: register offset within SYSCFG
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3rd cell: register bitmask for FMP bit
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For STM32F7, STM32H7 and STM32MP1 only.
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Example:
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i2c@40005400 {
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compatible = "st,stm32f4-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40005400 0x400>;
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interrupts = <31>,
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<32>;
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resets = <&rcc 277>;
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clocks = <&rcc 0 149>;
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pinctrl-0 = <&i2c1_sda_pin>, <&i2c1_scl_pin>;
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pinctrl-names = "default";
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};
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i2c@40005400 {
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compatible = "st,stm32f7-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40005400 0x400>;
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interrupts = <31>,
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<32>;
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resets = <&rcc STM32F7_APB1_RESET(I2C1)>;
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clocks = <&rcc 1 CLK_I2C1>;
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pinctrl-0 = <&i2c1_sda_pin>, <&i2c1_scl_pin>;
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pinctrl-names = "default";
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st,syscfg-fmp = <&syscfg 0x4 0x1>;
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};
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