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656e9007ef
Code that passes a 32-bit constant into cmpxchg() produces a harmless
sparse warning because of the truncation in the branch that is not taken:
fs/erofs/zdata.c: note: in included file (through /home/arnd/arm-soc/arch/arm/include/asm/cmpxchg.h, /home/arnd/arm-soc/arch/arm/include/asm/atomic.h, /home/arnd/arm-soc/include/linux/atomic.h, ...):
include/asm-generic/cmpxchg-local.h:29:33: warning: cast truncates bits from constant value (5f0ecafe becomes fe)
include/asm-generic/cmpxchg-local.h:33:34: warning: cast truncates bits from constant value (5f0ecafe becomes cafe)
include/asm-generic/cmpxchg-local.h:29:33: warning: cast truncates bits from constant value (5f0ecafe becomes fe)
include/asm-generic/cmpxchg-local.h:30:42: warning: cast truncates bits from constant value (5f0edead becomes ad)
include/asm-generic/cmpxchg-local.h:33:34: warning: cast truncates bits from constant value (5f0ecafe becomes cafe)
include/asm-generic/cmpxchg-local.h:34:44: warning: cast truncates bits from constant value (5f0edead becomes dead)
This was reported as a regression to Matt's recent __generic_cmpxchg_local
patch, though this patch only added more warnings on top of the ones
that were already there.
Rewording the truncation to use an explicit bitmask instead of a cast
to a smaller type avoids the warning but otherwise leaves the code
unchanged.
I had another look at why the cast is even needed for atomic_cmpxchg(),
and as Matt describes the problem here is that atomic_t contains a
signed 'int', but cmpxchg() takes an 'unsigned long' argument, and
converting between the two leads to a 64-bit sign-extension of
negative 32-bit atomics.
I checked the other implementations of arch_cmpxchg() and did not find
any others that run into the same problem as __generic_cmpxchg_local(),
but it's easy to be on the safe side here and always convert the
signed int into an unsigned int when calling arch_cmpxchg(), as this
will work even when any of the arch_cmpxchg() implementations run
into the same problem.
Fixes: 6246541522 ("locking/atomic: cmpxchg: Make __generic_cmpxchg_local compare against zero-extended 'old' value")
Reviewed-by: Matt Evans <mev@rivosinc.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
137 lines
3.5 KiB
C
137 lines
3.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Generic C implementation of atomic counter operations. Do not include in
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* machine independent code.
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*
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* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*/
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#ifndef __ASM_GENERIC_ATOMIC_H
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#define __ASM_GENERIC_ATOMIC_H
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#include <asm/cmpxchg.h>
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#include <asm/barrier.h>
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#ifdef CONFIG_SMP
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/* we can build all atomic primitives from cmpxchg */
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#define ATOMIC_OP(op, c_op) \
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static inline void generic_atomic_##op(int i, atomic_t *v) \
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{ \
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int c, old; \
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\
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c = v->counter; \
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while ((old = arch_cmpxchg(&v->counter, c, c c_op i)) != c) \
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c = old; \
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}
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#define ATOMIC_OP_RETURN(op, c_op) \
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static inline int generic_atomic_##op##_return(int i, atomic_t *v) \
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{ \
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int c, old; \
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\
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c = v->counter; \
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while ((old = arch_cmpxchg(&v->counter, c, c c_op i)) != c) \
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c = old; \
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\
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return c c_op i; \
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}
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#define ATOMIC_FETCH_OP(op, c_op) \
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static inline int generic_atomic_fetch_##op(int i, atomic_t *v) \
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{ \
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int c, old; \
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\
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c = v->counter; \
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while ((old = arch_cmpxchg(&v->counter, c, c c_op i)) != c) \
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c = old; \
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\
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return c; \
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}
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#else
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#include <linux/irqflags.h>
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#define ATOMIC_OP(op, c_op) \
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static inline void generic_atomic_##op(int i, atomic_t *v) \
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{ \
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unsigned long flags; \
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\
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raw_local_irq_save(flags); \
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v->counter = v->counter c_op i; \
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raw_local_irq_restore(flags); \
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}
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#define ATOMIC_OP_RETURN(op, c_op) \
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static inline int generic_atomic_##op##_return(int i, atomic_t *v) \
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{ \
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unsigned long flags; \
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int ret; \
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\
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raw_local_irq_save(flags); \
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ret = (v->counter = v->counter c_op i); \
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raw_local_irq_restore(flags); \
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\
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return ret; \
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}
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#define ATOMIC_FETCH_OP(op, c_op) \
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static inline int generic_atomic_fetch_##op(int i, atomic_t *v) \
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{ \
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unsigned long flags; \
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int ret; \
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\
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raw_local_irq_save(flags); \
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ret = v->counter; \
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v->counter = v->counter c_op i; \
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raw_local_irq_restore(flags); \
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\
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return ret; \
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}
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#endif /* CONFIG_SMP */
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ATOMIC_OP_RETURN(add, +)
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ATOMIC_OP_RETURN(sub, -)
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ATOMIC_FETCH_OP(add, +)
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ATOMIC_FETCH_OP(sub, -)
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ATOMIC_FETCH_OP(and, &)
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ATOMIC_FETCH_OP(or, |)
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ATOMIC_FETCH_OP(xor, ^)
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ATOMIC_OP(add, +)
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ATOMIC_OP(sub, -)
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ATOMIC_OP(and, &)
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ATOMIC_OP(or, |)
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ATOMIC_OP(xor, ^)
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#undef ATOMIC_FETCH_OP
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#undef ATOMIC_OP_RETURN
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#undef ATOMIC_OP
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#define arch_atomic_add_return generic_atomic_add_return
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#define arch_atomic_sub_return generic_atomic_sub_return
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#define arch_atomic_fetch_add generic_atomic_fetch_add
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#define arch_atomic_fetch_sub generic_atomic_fetch_sub
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#define arch_atomic_fetch_and generic_atomic_fetch_and
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#define arch_atomic_fetch_or generic_atomic_fetch_or
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#define arch_atomic_fetch_xor generic_atomic_fetch_xor
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#define arch_atomic_add generic_atomic_add
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#define arch_atomic_sub generic_atomic_sub
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#define arch_atomic_and generic_atomic_and
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#define arch_atomic_or generic_atomic_or
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#define arch_atomic_xor generic_atomic_xor
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#define arch_atomic_read(v) READ_ONCE((v)->counter)
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#define arch_atomic_set(v, i) WRITE_ONCE(((v)->counter), (i))
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#define arch_atomic_xchg(ptr, v) (arch_xchg(&(ptr)->counter, (u32)(v)))
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#define arch_atomic_cmpxchg(v, old, new) (arch_cmpxchg(&((v)->counter), (u32)(old), (u32)(new)))
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#endif /* __ASM_GENERIC_ATOMIC_H */
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