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23971bdfff
This pull-request includes: * Change in the IOMMU-API to convert the former iommu_domain_capable function to just iommu_capable * Various fixes in handling RMRR ranges for the VT-d driver (one fix requires a device driver core change which was acked by Greg KH) * The AMD IOMMU driver now assigns and deassigns complete alias groups to fix issues with devices using the wrong PCI request-id * MMU-401 support for the ARM SMMU driver * Multi-master IOMMU group support for the ARM SMMU driver * Various other small fixes all over the place -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQIcBAABAgAGBQJUPNxYAAoJECvwRC2XARrjMwMP/RLSr+oA31rGVjLXcmcCHl7Q Uj7xpcnG19qB0aqNR1JeJuZNkK/tw44pE353MQPbz4N9UVUiogklGIVD1iJvFV53 0qm84bvpDJIof4aP35B3H3Umft2USTn/lmsQg/RklQcNTW8DzNj63b8BTNR7k/GL G7bLg7F1BUCl0shZCCsFspOIulQPAJYN2OvHlfYBav/bfDvfouQ3lrV+loGrK44r F2Hmp+imXlIhUCjfbiWz6wKFxvPrxZx482vm2pXBCSnXEdW4/fz6nf9VHUK/Cfsq JAimY1CfiDo1aqH9/yVHUOw5SD/NYOXq6E5bFPg/WENbipbbae5cK2u6PX5MMBAn CG4BM8l9xicfGPqgn5YFSRY/6qC6K7NlxMnt9U8l18QIkDVDqEtUgJQISJuce7wx FWx6eSWaxpIe5yhq19/h2ELalUUyR/fPq+UXXjYDL1kLV/vcvC/lC3mbNAQU93zU WK0bG2tDg88JHavc25Ewa2aOn4BVM2BpwuLbYlgQReaEmsQRnEPgtmRNyLJHqbFE wwpCj8pBWdufsJWRyvpnXQ+CfA7oSz4e7hz1G+0/5uiDmagfvg16Ql5JtPmmuLUm Kc3dVIiG0s1ewohZIIJETGCqprQbCSqs8CCQqB6p2zDBWFKpNT7F38lm/KlehkCz JpAiI7Y2K9Jejp0VIPrt =OMOt -----END PGP SIGNATURE----- Merge tag 'iommu-updates-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu Pull IOMMU updates from Joerg Roedel: "This pull-request includes: - change in the IOMMU-API to convert the former iommu_domain_capable function to just iommu_capable - various fixes in handling RMRR ranges for the VT-d driver (one fix requires a device driver core change which was acked by Greg KH) - the AMD IOMMU driver now assigns and deassigns complete alias groups to fix issues with devices using the wrong PCI request-id - MMU-401 support for the ARM SMMU driver - multi-master IOMMU group support for the ARM SMMU driver - various other small fixes all over the place" * tag 'iommu-updates-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (41 commits) iommu/vt-d: Work around broken RMRR firmware entries iommu/vt-d: Store bus information in RMRR PCI device path iommu/vt-d: Only remove domain when device is removed driver core: Add BUS_NOTIFY_REMOVED_DEVICE event iommu/amd: Fix devid mapping for ivrs_ioapic override iommu/irq_remapping: Fix the regression of hpet irq remapping iommu: Fix bus notifier breakage iommu/amd: Split init_iommu_group() from iommu_init_device() iommu: Rework iommu_group_get_for_pci_dev() iommu: Make of_device_id array const amd_iommu: do not dereference a NULL pointer address. iommu/omap: Remove omap_iommu unused owner field iommu: Remove iommu_domain_has_cap() API function IB/usnic: Convert to use new iommu_capable() API function vfio: Convert to use new iommu_capable() API function kvm: iommu: Convert to use new iommu_capable() API function iommu/tegra: Convert to iommu_capable() API function iommu/msm: Convert to iommu_capable() API function iommu/vt-d: Convert to iommu_capable() API function iommu/fsl: Convert to iommu_capable() API function ...
359 lines
8.2 KiB
C
359 lines
8.2 KiB
C
/*
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* Copyright (c) 2006, Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc., 59 Temple
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* Place - Suite 330, Boston, MA 02111-1307 USA.
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*
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* Copyright (C) 2006-2008 Intel Corporation
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* Copyright IBM Corporation, 2008
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* Copyright 2010 Red Hat, Inc. and/or its affiliates.
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*
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* Author: Allen M. Kay <allen.m.kay@intel.com>
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* Author: Weidong Han <weidong.han@intel.com>
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* Author: Ben-Ami Yassour <benami@il.ibm.com>
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*/
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#include <linux/list.h>
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#include <linux/kvm_host.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/stat.h>
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#include <linux/dmar.h>
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#include <linux/iommu.h>
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#include <linux/intel-iommu.h>
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static bool allow_unsafe_assigned_interrupts;
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module_param_named(allow_unsafe_assigned_interrupts,
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allow_unsafe_assigned_interrupts, bool, S_IRUGO | S_IWUSR);
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MODULE_PARM_DESC(allow_unsafe_assigned_interrupts,
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"Enable device assignment on platforms without interrupt remapping support.");
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static int kvm_iommu_unmap_memslots(struct kvm *kvm);
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static void kvm_iommu_put_pages(struct kvm *kvm,
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gfn_t base_gfn, unsigned long npages);
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static pfn_t kvm_pin_pages(struct kvm_memory_slot *slot, gfn_t gfn,
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unsigned long size)
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{
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gfn_t end_gfn;
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pfn_t pfn;
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pfn = gfn_to_pfn_memslot(slot, gfn);
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end_gfn = gfn + (size >> PAGE_SHIFT);
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gfn += 1;
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if (is_error_noslot_pfn(pfn))
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return pfn;
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while (gfn < end_gfn)
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gfn_to_pfn_memslot(slot, gfn++);
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return pfn;
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}
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static void kvm_unpin_pages(struct kvm *kvm, pfn_t pfn, unsigned long npages)
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{
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unsigned long i;
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for (i = 0; i < npages; ++i)
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kvm_release_pfn_clean(pfn + i);
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}
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int kvm_iommu_map_pages(struct kvm *kvm, struct kvm_memory_slot *slot)
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{
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gfn_t gfn, end_gfn;
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pfn_t pfn;
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int r = 0;
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struct iommu_domain *domain = kvm->arch.iommu_domain;
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int flags;
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/* check if iommu exists and in use */
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if (!domain)
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return 0;
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gfn = slot->base_gfn;
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end_gfn = gfn + slot->npages;
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flags = IOMMU_READ;
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if (!(slot->flags & KVM_MEM_READONLY))
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flags |= IOMMU_WRITE;
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if (!kvm->arch.iommu_noncoherent)
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flags |= IOMMU_CACHE;
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while (gfn < end_gfn) {
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unsigned long page_size;
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/* Check if already mapped */
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if (iommu_iova_to_phys(domain, gfn_to_gpa(gfn))) {
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gfn += 1;
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continue;
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}
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/* Get the page size we could use to map */
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page_size = kvm_host_page_size(kvm, gfn);
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/* Make sure the page_size does not exceed the memslot */
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while ((gfn + (page_size >> PAGE_SHIFT)) > end_gfn)
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page_size >>= 1;
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/* Make sure gfn is aligned to the page size we want to map */
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while ((gfn << PAGE_SHIFT) & (page_size - 1))
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page_size >>= 1;
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/* Make sure hva is aligned to the page size we want to map */
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while (__gfn_to_hva_memslot(slot, gfn) & (page_size - 1))
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page_size >>= 1;
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/*
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* Pin all pages we are about to map in memory. This is
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* important because we unmap and unpin in 4kb steps later.
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*/
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pfn = kvm_pin_pages(slot, gfn, page_size);
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if (is_error_noslot_pfn(pfn)) {
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gfn += 1;
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continue;
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}
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/* Map into IO address space */
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r = iommu_map(domain, gfn_to_gpa(gfn), pfn_to_hpa(pfn),
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page_size, flags);
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if (r) {
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printk(KERN_ERR "kvm_iommu_map_address:"
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"iommu failed to map pfn=%llx\n", pfn);
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kvm_unpin_pages(kvm, pfn, page_size);
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goto unmap_pages;
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}
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gfn += page_size >> PAGE_SHIFT;
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}
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return 0;
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unmap_pages:
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kvm_iommu_put_pages(kvm, slot->base_gfn, gfn - slot->base_gfn);
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return r;
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}
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static int kvm_iommu_map_memslots(struct kvm *kvm)
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{
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int idx, r = 0;
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struct kvm_memslots *slots;
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struct kvm_memory_slot *memslot;
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if (kvm->arch.iommu_noncoherent)
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kvm_arch_register_noncoherent_dma(kvm);
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idx = srcu_read_lock(&kvm->srcu);
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slots = kvm_memslots(kvm);
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kvm_for_each_memslot(memslot, slots) {
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r = kvm_iommu_map_pages(kvm, memslot);
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if (r)
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break;
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}
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srcu_read_unlock(&kvm->srcu, idx);
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return r;
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}
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int kvm_assign_device(struct kvm *kvm,
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struct kvm_assigned_dev_kernel *assigned_dev)
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{
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struct pci_dev *pdev = NULL;
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struct iommu_domain *domain = kvm->arch.iommu_domain;
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int r;
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bool noncoherent;
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/* check if iommu exists and in use */
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if (!domain)
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return 0;
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pdev = assigned_dev->dev;
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if (pdev == NULL)
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return -ENODEV;
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r = iommu_attach_device(domain, &pdev->dev);
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if (r) {
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dev_err(&pdev->dev, "kvm assign device failed ret %d", r);
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return r;
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}
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noncoherent = !iommu_capable(&pci_bus_type, IOMMU_CAP_CACHE_COHERENCY);
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/* Check if need to update IOMMU page table for guest memory */
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if (noncoherent != kvm->arch.iommu_noncoherent) {
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kvm_iommu_unmap_memslots(kvm);
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kvm->arch.iommu_noncoherent = noncoherent;
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r = kvm_iommu_map_memslots(kvm);
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if (r)
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goto out_unmap;
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}
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pci_set_dev_assigned(pdev);
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dev_info(&pdev->dev, "kvm assign device\n");
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return 0;
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out_unmap:
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kvm_iommu_unmap_memslots(kvm);
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return r;
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}
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int kvm_deassign_device(struct kvm *kvm,
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struct kvm_assigned_dev_kernel *assigned_dev)
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{
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struct iommu_domain *domain = kvm->arch.iommu_domain;
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struct pci_dev *pdev = NULL;
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/* check if iommu exists and in use */
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if (!domain)
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return 0;
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pdev = assigned_dev->dev;
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if (pdev == NULL)
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return -ENODEV;
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iommu_detach_device(domain, &pdev->dev);
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pci_clear_dev_assigned(pdev);
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dev_info(&pdev->dev, "kvm deassign device\n");
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return 0;
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}
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int kvm_iommu_map_guest(struct kvm *kvm)
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{
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int r;
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if (!iommu_present(&pci_bus_type)) {
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printk(KERN_ERR "%s: iommu not found\n", __func__);
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return -ENODEV;
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}
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mutex_lock(&kvm->slots_lock);
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kvm->arch.iommu_domain = iommu_domain_alloc(&pci_bus_type);
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if (!kvm->arch.iommu_domain) {
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r = -ENOMEM;
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goto out_unlock;
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}
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if (!allow_unsafe_assigned_interrupts &&
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!iommu_capable(&pci_bus_type, IOMMU_CAP_INTR_REMAP)) {
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printk(KERN_WARNING "%s: No interrupt remapping support,"
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" disallowing device assignment."
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" Re-enble with \"allow_unsafe_assigned_interrupts=1\""
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" module option.\n", __func__);
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iommu_domain_free(kvm->arch.iommu_domain);
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kvm->arch.iommu_domain = NULL;
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r = -EPERM;
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goto out_unlock;
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}
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r = kvm_iommu_map_memslots(kvm);
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if (r)
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kvm_iommu_unmap_memslots(kvm);
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out_unlock:
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mutex_unlock(&kvm->slots_lock);
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return r;
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}
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static void kvm_iommu_put_pages(struct kvm *kvm,
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gfn_t base_gfn, unsigned long npages)
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{
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struct iommu_domain *domain;
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gfn_t end_gfn, gfn;
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pfn_t pfn;
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u64 phys;
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domain = kvm->arch.iommu_domain;
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end_gfn = base_gfn + npages;
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gfn = base_gfn;
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/* check if iommu exists and in use */
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if (!domain)
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return;
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while (gfn < end_gfn) {
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unsigned long unmap_pages;
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size_t size;
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/* Get physical address */
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phys = iommu_iova_to_phys(domain, gfn_to_gpa(gfn));
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if (!phys) {
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gfn++;
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continue;
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}
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pfn = phys >> PAGE_SHIFT;
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/* Unmap address from IO address space */
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size = iommu_unmap(domain, gfn_to_gpa(gfn), PAGE_SIZE);
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unmap_pages = 1ULL << get_order(size);
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/* Unpin all pages we just unmapped to not leak any memory */
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kvm_unpin_pages(kvm, pfn, unmap_pages);
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gfn += unmap_pages;
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}
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}
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void kvm_iommu_unmap_pages(struct kvm *kvm, struct kvm_memory_slot *slot)
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{
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kvm_iommu_put_pages(kvm, slot->base_gfn, slot->npages);
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}
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static int kvm_iommu_unmap_memslots(struct kvm *kvm)
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{
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int idx;
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struct kvm_memslots *slots;
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struct kvm_memory_slot *memslot;
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idx = srcu_read_lock(&kvm->srcu);
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slots = kvm_memslots(kvm);
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kvm_for_each_memslot(memslot, slots)
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kvm_iommu_unmap_pages(kvm, memslot);
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srcu_read_unlock(&kvm->srcu, idx);
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if (kvm->arch.iommu_noncoherent)
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kvm_arch_unregister_noncoherent_dma(kvm);
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return 0;
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}
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int kvm_iommu_unmap_guest(struct kvm *kvm)
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{
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struct iommu_domain *domain = kvm->arch.iommu_domain;
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/* check if iommu exists and in use */
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if (!domain)
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return 0;
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mutex_lock(&kvm->slots_lock);
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kvm_iommu_unmap_memslots(kvm);
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kvm->arch.iommu_domain = NULL;
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kvm->arch.iommu_noncoherent = false;
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mutex_unlock(&kvm->slots_lock);
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iommu_domain_free(domain);
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return 0;
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}
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