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8ff374b9c2
Replace hardcoded CP0 PRId and CP1 FPIR register access masks throughout. The change does not touch places that use shifted or partial masks. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5838/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
141 lines
3.4 KiB
C
141 lines
3.4 KiB
C
/*
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* Copyright (C) 2000,2001,2002,2003,2004 Broadcom Corporation
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/reboot.h>
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#include <linux/string.h>
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#include <asm/bootinfo.h>
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#include <asm/cpu.h>
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#include <asm/mipsregs.h>
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#include <asm/io.h>
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#include <asm/sibyte/sb1250.h>
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#include <asm/sibyte/bcm1480_regs.h>
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#include <asm/sibyte/bcm1480_scd.h>
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#include <asm/sibyte/sb1250_scd.h>
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unsigned int sb1_pass;
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unsigned int soc_pass;
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unsigned int soc_type;
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EXPORT_SYMBOL(soc_type);
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unsigned int periph_rev;
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unsigned int zbbus_mhz;
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EXPORT_SYMBOL(zbbus_mhz);
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static unsigned int part_type;
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static char *soc_str;
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static char *pass_str;
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static int __init setup_bcm1x80_bcm1x55(void)
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{
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int ret = 0;
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switch (soc_pass) {
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case K_SYS_REVISION_BCM1480_S0:
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periph_rev = 1;
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pass_str = "S0 (pass1)";
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break;
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case K_SYS_REVISION_BCM1480_A1:
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periph_rev = 1;
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pass_str = "A1 (pass1)";
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break;
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case K_SYS_REVISION_BCM1480_A2:
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periph_rev = 1;
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pass_str = "A2 (pass1)";
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break;
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case K_SYS_REVISION_BCM1480_A3:
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periph_rev = 1;
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pass_str = "A3 (pass1)";
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break;
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case K_SYS_REVISION_BCM1480_B0:
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periph_rev = 1;
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pass_str = "B0 (pass2)";
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break;
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default:
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printk("Unknown %s rev %x\n", soc_str, soc_pass);
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periph_rev = 1;
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pass_str = "Unknown Revision";
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break;
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}
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return ret;
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}
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/* Setup code likely to be common to all SiByte platforms */
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static int __init sys_rev_decode(void)
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{
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int ret = 0;
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switch (soc_type) {
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case K_SYS_SOC_TYPE_BCM1x80:
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if (part_type == K_SYS_PART_BCM1480)
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soc_str = "BCM1480";
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else if (part_type == K_SYS_PART_BCM1280)
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soc_str = "BCM1280";
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else
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soc_str = "BCM1x80";
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ret = setup_bcm1x80_bcm1x55();
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break;
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case K_SYS_SOC_TYPE_BCM1x55:
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if (part_type == K_SYS_PART_BCM1455)
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soc_str = "BCM1455";
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else if (part_type == K_SYS_PART_BCM1255)
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soc_str = "BCM1255";
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else
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soc_str = "BCM1x55";
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ret = setup_bcm1x80_bcm1x55();
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break;
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default:
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printk("Unknown part type %x\n", part_type);
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ret = 1;
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break;
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}
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return ret;
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}
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void __init bcm1480_setup(void)
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{
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uint64_t sys_rev;
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int plldiv;
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sb1_pass = read_c0_prid() & PRID_REV_MASK;
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sys_rev = __raw_readq(IOADDR(A_SCD_SYSTEM_REVISION));
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soc_type = SYS_SOC_TYPE(sys_rev);
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part_type = G_SYS_PART(sys_rev);
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soc_pass = G_SYS_REVISION(sys_rev);
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if (sys_rev_decode()) {
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printk("Restart after failure to identify SiByte chip\n");
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machine_restart(NULL);
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}
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plldiv = G_BCM1480_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG)));
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zbbus_mhz = ((plldiv >> 1) * 50) + ((plldiv & 1) * 25);
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printk("Broadcom SiByte %s %s @ %d MHz (SB-1A rev %d)\n",
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soc_str, pass_str, zbbus_mhz * 2, sb1_pass);
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printk("Board type: %s\n", get_system_type());
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}
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