mirror of
https://github.com/torvalds/linux.git
synced 2024-11-17 17:41:44 +00:00
cdfc83075f
Pull MIPS updates from Ralf Baechle:
"The most notable new addition inside this pull request is the support
for MIPS's latest and greatest core called "inter/proAptiv". The
patch series describes this core as follows.
"The interAptiv is a power-efficient multi-core microprocessor
for use in system-on-chip (SoC) applications. The interAptiv combines
a multi-threading pipeline with a coherence manager to deliver improved
computational throughput and power efficiency. The interAptiv can
contain one to four MIPS32R3 interAptiv cores, system level
coherence manager with L2 cache, optional coherent I/O port,
and optional floating point unit."
The platform specific patches touch all 3 Broadcom families. It adds
support for the new Broadcom/Netlogix XLP9xx Soc, building a common
BCM63XX SMP kernel for all BCM63XX SoCs regardless of core type/count
and full gpio button/led descriptions for BCM47xx.
The rest of the series are cleanups and bug fixes that are MIPS
generic and consist largely of changes that Imgtec/MIPS had published
in their linux-mti-3.10.git stable tree. Random other cleanups and
patches preparing code to be merged in 3.15"
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (139 commits)
mips: select ARCH_MIGHT_HAVE_PC_SERIO
mips: delete non-required instances of include <linux/init.h>
MIPS: KVM: remove shadow_tlb code
MIPS: KVM: use common EHINV aware UNIQUE_ENTRYHI
mips/ide: flush dcache also if icache does not snoop dcache
MIPS: BCM47XX: fix position of cpu_wait disabling
MIPS: BCM63XX: select correct MIPS_L1_CACHE_SHIFT value
MIPS: update MIPS_L1_CACHE_SHIFT based on MIPS_L1_CACHE_SHIFT_<N>
MIPS: introduce MIPS_L1_CACHE_SHIFT_<N>
MIPS: ZBOOT: gather string functions into string.c
arch/mips/pci: don't check resource with devm_ioremap_resource
arch/mips/lantiq/xway: don't check resource with devm_ioremap_resource
bcma: gpio: don't cast u32 to unsigned long
ssb: gpio: add own IRQ domain
MIPS: BCM47XX: fix sparse warnings in board.c
MIPS: BCM47XX: add board detection for Linksys WRT54GS V1
MIPS: BCM47XX: fix detection for some boards
MIPS: BCM47XX: Enable buttons support on SSB
MIPS: BCM47XX: Convert WNDR4500 to new syntax
MIPS: BCM47XX: Use "timer" trigger for status LEDs
...
131 lines
2.7 KiB
C
131 lines
2.7 KiB
C
/*
|
|
* This file is subject to the terms and conditions of the GNU General Public
|
|
* License. See the file "COPYING" in the main directory of this archive
|
|
* for more details.
|
|
*
|
|
* Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved.
|
|
* Copyright (C) 2013 Imagination Technologies Ltd.
|
|
*/
|
|
#ifndef _ASM_VPE_H
|
|
#define _ASM_VPE_H
|
|
|
|
#include <linux/init.h>
|
|
#include <linux/list.h>
|
|
#include <linux/smp.h>
|
|
#include <linux/spinlock.h>
|
|
|
|
#define VPE_MODULE_NAME "vpe"
|
|
#define VPE_MODULE_MINOR 1
|
|
|
|
/* grab the likely amount of memory we will need. */
|
|
#ifdef CONFIG_MIPS_VPE_LOADER_TOM
|
|
#define P_SIZE (2 * 1024 * 1024)
|
|
#else
|
|
/* add an overhead to the max kmalloc size for non-striped symbols/etc */
|
|
#define P_SIZE (256 * 1024)
|
|
#endif
|
|
|
|
#define MAX_VPES 16
|
|
#define VPE_PATH_MAX 256
|
|
|
|
static inline int aprp_cpu_index(void)
|
|
{
|
|
#ifdef CONFIG_MIPS_CMP
|
|
return setup_max_cpus;
|
|
#else
|
|
extern int tclimit;
|
|
return tclimit;
|
|
#endif
|
|
}
|
|
|
|
enum vpe_state {
|
|
VPE_STATE_UNUSED = 0,
|
|
VPE_STATE_INUSE,
|
|
VPE_STATE_RUNNING
|
|
};
|
|
|
|
enum tc_state {
|
|
TC_STATE_UNUSED = 0,
|
|
TC_STATE_INUSE,
|
|
TC_STATE_RUNNING,
|
|
TC_STATE_DYNAMIC
|
|
};
|
|
|
|
struct vpe {
|
|
enum vpe_state state;
|
|
|
|
/* (device) minor associated with this vpe */
|
|
int minor;
|
|
|
|
/* elfloader stuff */
|
|
void *load_addr;
|
|
unsigned long len;
|
|
char *pbuffer;
|
|
unsigned long plen;
|
|
char cwd[VPE_PATH_MAX];
|
|
|
|
unsigned long __start;
|
|
|
|
/* tc's associated with this vpe */
|
|
struct list_head tc;
|
|
|
|
/* The list of vpe's */
|
|
struct list_head list;
|
|
|
|
/* shared symbol address */
|
|
void *shared_ptr;
|
|
|
|
/* the list of who wants to know when something major happens */
|
|
struct list_head notify;
|
|
|
|
unsigned int ntcs;
|
|
};
|
|
|
|
struct tc {
|
|
enum tc_state state;
|
|
int index;
|
|
|
|
struct vpe *pvpe; /* parent VPE */
|
|
struct list_head tc; /* The list of TC's with this VPE */
|
|
struct list_head list; /* The global list of tc's */
|
|
};
|
|
|
|
struct vpe_notifications {
|
|
void (*start)(int vpe);
|
|
void (*stop)(int vpe);
|
|
|
|
struct list_head list;
|
|
};
|
|
|
|
struct vpe_control {
|
|
spinlock_t vpe_list_lock;
|
|
struct list_head vpe_list; /* Virtual processing elements */
|
|
spinlock_t tc_list_lock;
|
|
struct list_head tc_list; /* Thread contexts */
|
|
};
|
|
|
|
extern unsigned long physical_memsize;
|
|
extern struct vpe_control vpecontrol;
|
|
extern const struct file_operations vpe_fops;
|
|
|
|
int vpe_notify(int index, struct vpe_notifications *notify);
|
|
|
|
void *vpe_get_shared(int index);
|
|
char *vpe_getcwd(int index);
|
|
|
|
struct vpe *get_vpe(int minor);
|
|
struct tc *get_tc(int index);
|
|
struct vpe *alloc_vpe(int minor);
|
|
struct tc *alloc_tc(int index);
|
|
void release_vpe(struct vpe *v);
|
|
|
|
void *alloc_progmem(unsigned long len);
|
|
void release_progmem(void *ptr);
|
|
|
|
int __weak vpe_run(struct vpe *v);
|
|
void cleanup_tc(struct tc *tc);
|
|
|
|
int __init vpe_module_init(void);
|
|
void __exit vpe_module_exit(void);
|
|
#endif /* _ASM_VPE_H */
|