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* Don't send an IPI if receiver already has a pending IPI. Atomically piggyback the new msg with pending msg. * IPI receiver looping on xchg() not required References: https://lkml.org/lkml/2013/11/25/232 Suggested-by: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
345 lines
8.1 KiB
C
345 lines
8.1 KiB
C
/*
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* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* RajeshwarR: Dec 11, 2007
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* -- Added support for Inter Processor Interrupts
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*
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* Vineetg: Nov 1st, 2007
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* -- Initial Write (Borrowed heavily from ARM)
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/spinlock.h>
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#include <linux/sched.h>
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#include <linux/interrupt.h>
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#include <linux/profile.h>
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/mm.h>
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#include <linux/cpu.h>
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#include <linux/smp.h>
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#include <linux/irq.h>
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#include <linux/delay.h>
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#include <linux/atomic.h>
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#include <linux/percpu.h>
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#include <linux/cpumask.h>
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#include <linux/spinlock_types.h>
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#include <linux/reboot.h>
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#include <asm/processor.h>
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#include <asm/setup.h>
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#include <asm/mach_desc.h>
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arch_spinlock_t smp_atomic_ops_lock = __ARCH_SPIN_LOCK_UNLOCKED;
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arch_spinlock_t smp_bitops_lock = __ARCH_SPIN_LOCK_UNLOCKED;
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struct plat_smp_ops plat_smp_ops;
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/* XXX: per cpu ? Only needed once in early seconday boot */
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struct task_struct *secondary_idle_tsk;
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/* Called from start_kernel */
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void __init smp_prepare_boot_cpu(void)
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{
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}
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/*
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* Initialise the CPU possible map early - this describes the CPUs
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* which may be present or become present in the system.
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*/
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void __init smp_init_cpus(void)
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{
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unsigned int i;
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for (i = 0; i < NR_CPUS; i++)
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set_cpu_possible(i, true);
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}
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/* called from init ( ) => process 1 */
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void __init smp_prepare_cpus(unsigned int max_cpus)
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{
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int i;
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/*
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* Initialise the present map, which describes the set of CPUs
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* actually populated at the present time.
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*/
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for (i = 0; i < max_cpus; i++)
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set_cpu_present(i, true);
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}
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void __init smp_cpus_done(unsigned int max_cpus)
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{
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}
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/*
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* After power-up, a non Master CPU needs to wait for Master to kick start it
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*
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* The default implementation halts
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*
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* This relies on platform specific support allowing Master to directly set
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* this CPU's PC (to be @first_lines_of_secondary() and kick start it.
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*
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* In lack of such h/w assist, platforms can override this function
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* - make this function busy-spin on a token, eventually set by Master
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* (from arc_platform_smp_wakeup_cpu())
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* - Once token is available, jump to @first_lines_of_secondary
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* (using inline asm).
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*
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* Alert: can NOT use stack here as it has not been determined/setup for CPU.
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* If it turns out to be elaborate, it's better to code it in assembly
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*
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*/
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void __weak arc_platform_smp_wait_to_boot(int cpu)
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{
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/*
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* As a hack for debugging - since debugger will single-step over the
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* FLAG insn - wrap the halt itself it in a self loop
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*/
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__asm__ __volatile__(
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"1: \n"
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" flag 1 \n"
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" b 1b \n");
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}
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const char *arc_platform_smp_cpuinfo(void)
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{
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return plat_smp_ops.info;
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}
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/*
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* The very first "C" code executed by secondary
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* Called from asm stub in head.S
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* "current"/R25 already setup by low level boot code
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*/
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void start_kernel_secondary(void)
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{
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struct mm_struct *mm = &init_mm;
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unsigned int cpu = smp_processor_id();
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/* MMU, Caches, Vector Table, Interrupts etc */
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setup_processor();
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atomic_inc(&mm->mm_users);
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atomic_inc(&mm->mm_count);
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current->active_mm = mm;
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cpumask_set_cpu(cpu, mm_cpumask(mm));
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notify_cpu_starting(cpu);
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set_cpu_online(cpu, true);
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pr_info("## CPU%u LIVE ##: Executing Code...\n", cpu);
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if (machine_desc->init_smp)
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machine_desc->init_smp(smp_processor_id());
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arc_local_timer_setup(cpu);
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local_irq_enable();
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preempt_disable();
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cpu_startup_entry(CPUHP_ONLINE);
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}
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/*
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* Called from kernel_init( ) -> smp_init( ) - for each CPU
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*
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* At this point, Secondary Processor is "HALT"ed:
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* -It booted, but was halted in head.S
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* -It was configured to halt-on-reset
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* So need to wake it up.
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*
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* Essential requirements being where to run from (PC) and stack (SP)
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*/
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int __cpu_up(unsigned int cpu, struct task_struct *idle)
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{
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unsigned long wait_till;
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secondary_idle_tsk = idle;
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pr_info("Idle Task [%d] %p", cpu, idle);
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pr_info("Trying to bring up CPU%u ...\n", cpu);
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if (plat_smp_ops.cpu_kick)
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plat_smp_ops.cpu_kick(cpu,
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(unsigned long)first_lines_of_secondary);
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/* wait for 1 sec after kicking the secondary */
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wait_till = jiffies + HZ;
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while (time_before(jiffies, wait_till)) {
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if (cpu_online(cpu))
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break;
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}
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if (!cpu_online(cpu)) {
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pr_info("Timeout: CPU%u FAILED to comeup !!!\n", cpu);
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return -1;
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}
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secondary_idle_tsk = NULL;
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return 0;
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}
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/*
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* not supported here
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*/
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int __init setup_profiling_timer(unsigned int multiplier)
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{
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return -EINVAL;
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}
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/*****************************************************************************/
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/* Inter Processor Interrupt Handling */
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/*****************************************************************************/
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enum ipi_msg_type {
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IPI_EMPTY = 0,
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IPI_RESCHEDULE = 1,
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IPI_CALL_FUNC,
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IPI_CPU_STOP,
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};
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/*
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* In arches with IRQ for each msg type (above), receiver can use IRQ-id to
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* figure out what msg was sent. For those which don't (ARC has dedicated IPI
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* IRQ), the msg-type needs to be conveyed via per-cpu data
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*/
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static DEFINE_PER_CPU(unsigned long, ipi_data);
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static void ipi_send_msg_one(int cpu, enum ipi_msg_type msg)
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{
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unsigned long __percpu *ipi_data_ptr = per_cpu_ptr(&ipi_data, cpu);
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unsigned long old, new;
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unsigned long flags;
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pr_debug("%d Sending msg [%d] to %d\n", smp_processor_id(), msg, cpu);
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local_irq_save(flags);
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/*
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* Atomically write new msg bit (in case others are writing too),
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* and read back old value
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*/
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do {
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new = old = *ipi_data_ptr;
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new |= 1U << msg;
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} while (cmpxchg(ipi_data_ptr, old, new) != old);
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/*
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* Call the platform specific IPI kick function, but avoid if possible:
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* Only do so if there's no pending msg from other concurrent sender(s).
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* Otherwise, recevier will see this msg as well when it takes the
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* IPI corresponding to that msg. This is true, even if it is already in
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* IPI handler, because !@old means it has not yet dequeued the msg(s)
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* so @new msg can be a free-loader
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*/
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if (plat_smp_ops.ipi_send && !old)
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plat_smp_ops.ipi_send(cpu);
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local_irq_restore(flags);
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}
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static void ipi_send_msg(const struct cpumask *callmap, enum ipi_msg_type msg)
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{
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unsigned int cpu;
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for_each_cpu(cpu, callmap)
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ipi_send_msg_one(cpu, msg);
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}
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void smp_send_reschedule(int cpu)
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{
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ipi_send_msg_one(cpu, IPI_RESCHEDULE);
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}
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void smp_send_stop(void)
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{
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struct cpumask targets;
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cpumask_copy(&targets, cpu_online_mask);
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cpumask_clear_cpu(smp_processor_id(), &targets);
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ipi_send_msg(&targets, IPI_CPU_STOP);
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}
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void arch_send_call_function_single_ipi(int cpu)
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{
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ipi_send_msg_one(cpu, IPI_CALL_FUNC);
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}
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void arch_send_call_function_ipi_mask(const struct cpumask *mask)
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{
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ipi_send_msg(mask, IPI_CALL_FUNC);
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}
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/*
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* ipi_cpu_stop - handle IPI from smp_send_stop()
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*/
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static void ipi_cpu_stop(void)
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{
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machine_halt();
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}
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static inline void __do_IPI(unsigned long msg)
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{
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switch (msg) {
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case IPI_RESCHEDULE:
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scheduler_ipi();
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break;
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case IPI_CALL_FUNC:
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generic_smp_call_function_interrupt();
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break;
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case IPI_CPU_STOP:
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ipi_cpu_stop();
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break;
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default:
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pr_warn("IPI with unexpected msg %ld\n", msg);
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}
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}
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/*
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* arch-common ISR to handle for inter-processor interrupts
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* Has hooks for platform specific IPI
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*/
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irqreturn_t do_IPI(int irq, void *dev_id)
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{
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unsigned long pending;
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pr_debug("IPI [%ld] received on cpu %d\n",
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*this_cpu_ptr(&ipi_data), smp_processor_id());
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if (plat_smp_ops.ipi_clear)
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plat_smp_ops.ipi_clear(irq);
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/*
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* "dequeue" the msg corresponding to this IPI (and possibly other
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* piggybacked msg from elided IPIs: see ipi_send_msg_one() above)
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*/
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pending = xchg(this_cpu_ptr(&ipi_data), 0);
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do {
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unsigned long msg = __ffs(pending);
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__do_IPI(msg);
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pending &= ~(1U << msg);
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} while (pending);
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return IRQ_HANDLED;
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}
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/*
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* API called by platform code to hookup arch-common ISR to their IPI IRQ
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*/
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static DEFINE_PER_CPU(int, ipi_dev);
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int smp_ipi_irq_setup(int cpu, int irq)
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{
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int *dev_id = &per_cpu(ipi_dev, smp_processor_id());
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return request_percpu_irq(irq, do_IPI, "IPI Interrupt", dev_id);
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}
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