mirror of
https://github.com/torvalds/linux.git
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49d5759268
- Provide a virtual cache topology to the guest to avoid
inconsistencies with migration on heterogenous systems. Non secure
software has no practical need to traverse the caches by set/way in
the first place.
- Add support for taking stage-2 access faults in parallel. This was an
accidental omission in the original parallel faults implementation,
but should provide a marginal improvement to machines w/o FEAT_HAFDBS
(such as hardware from the fruit company).
- A preamble to adding support for nested virtualization to KVM,
including vEL2 register state, rudimentary nested exception handling
and masking unsupported features for nested guests.
- Fixes to the PSCI relay that avoid an unexpected host SVE trap when
resuming a CPU when running pKVM.
- VGIC maintenance interrupt support for the AIC
- Improvements to the arch timer emulation, primarily aimed at reducing
the trap overhead of running nested.
- Add CONFIG_USERFAULTFD to the KVM selftests config fragment in the
interest of CI systems.
- Avoid VM-wide stop-the-world operations when a vCPU accesses its own
redistributor.
- Serialize when toggling CPACR_EL1.SMEN to avoid unexpected exceptions
in the host.
- Aesthetic and comment/kerneldoc fixes
- Drop the vestiges of the old Columbia mailing list and add [Oliver]
as co-maintainer
This also drags in arm64's 'for-next/sme2' branch, because both it and
the PSCI relay changes touch the EL2 initialization code.
RISC-V:
- Fix wrong usage of PGDIR_SIZE instead of PUD_SIZE
- Correctly place the guest in S-mode after redirecting a trap to the guest
- Redirect illegal instruction traps to guest
- SBI PMU support for guest
s390:
- Two patches sorting out confusion between virtual and physical
addresses, which currently are the same on s390.
- A new ioctl that performs cmpxchg on guest memory
- A few fixes
x86:
- Change tdp_mmu to a read-only parameter
- Separate TDP and shadow MMU page fault paths
- Enable Hyper-V invariant TSC control
- Fix a variety of APICv and AVIC bugs, some of them real-world,
some of them affecting architecurally legal but unlikely to
happen in practice
- Mark APIC timer as expired if its in one-shot mode and the count
underflows while the vCPU task was being migrated
- Advertise support for Intel's new fast REP string features
- Fix a double-shootdown issue in the emergency reboot code
- Ensure GIF=1 and disable SVM during an emergency reboot, i.e. give SVM
similar treatment to VMX
- Update Xen's TSC info CPUID sub-leaves as appropriate
- Add support for Hyper-V's extended hypercalls, where "support" at this
point is just forwarding the hypercalls to userspace
- Clean up the kvm->lock vs. kvm->srcu sequences when updating the PMU and
MSR filters
- One-off fixes and cleanups
- Fix and cleanup the range-based TLB flushing code, used when KVM is
running on Hyper-V
- Add support for filtering PMU events using a mask. If userspace
wants to restrict heavily what events the guest can use, it can now
do so without needing an absurd number of filter entries
- Clean up KVM's handling of "PMU MSRs to save", especially when vPMU
support is disabled
- Add PEBS support for Intel Sapphire Rapids
- Fix a mostly benign overflow bug in SEV's send|receive_update_data()
- Move several SVM-specific flags into vcpu_svm
x86 Intel:
- Handle NMI VM-Exits before leaving the noinstr region
- A few trivial cleanups in the VM-Enter flows
- Stop enabling VMFUNC for L1 purely to document that KVM doesn't support
EPTP switching (or any other VM function) for L1
- Fix a crash when using eVMCS's enlighted MSR bitmaps
Generic:
- Clean up the hardware enable and initialization flow, which was
scattered around multiple arch-specific hooks. Instead, just
let the arch code call into generic code. Both x86 and ARM should
benefit from not having to fight common KVM code's notion of how
to do initialization.
- Account allocations in generic kvm_arch_alloc_vm()
- Fix a memory leak if coalesced MMIO unregistration fails
selftests:
- On x86, cache the CPU vendor (AMD vs. Intel) and use the info to emit
the correct hypercall instruction instead of relying on KVM to patch
in VMMCALL
- Use TAP interface for kvm_binary_stats_test and tsc_msrs_test
-----BEGIN PGP SIGNATURE-----
iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmP2YA0UHHBib256aW5p
QHJlZGhhdC5jb20ACgkQv/vSX3jHroPg/Qf+J6nT+TkIa+8Ei+fN1oMTDp4YuIOx
mXvJ9mRK9sQ+tAUVwvDz3qN/fK5mjsYbRHIDlVc5p2Q3bCrVGDDqXPFfCcLx1u+O
9U9xjkO4JxD2LS9pc70FYOyzVNeJ8VMGOBbC2b0lkdYZ4KnUc6e/WWFKJs96bK+H
duo+RIVyaMthnvbTwSv1K3qQb61n6lSJXplywS8KWFK6NZAmBiEFDAWGRYQE9lLs
VcVcG0iDJNL/BQJ5InKCcvXVGskcCm9erDszPo7w4Bypa4S9AMS42DHUaRZrBJwV
/WqdH7ckIz7+OSV0W1j+bKTHAFVTCjXYOM7wQykgjawjICzMSnnG9Gpskw==
=goe1
-----END PGP SIGNATURE-----
Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull kvm updates from Paolo Bonzini:
"ARM:
- Provide a virtual cache topology to the guest to avoid
inconsistencies with migration on heterogenous systems. Non secure
software has no practical need to traverse the caches by set/way in
the first place
- Add support for taking stage-2 access faults in parallel. This was
an accidental omission in the original parallel faults
implementation, but should provide a marginal improvement to
machines w/o FEAT_HAFDBS (such as hardware from the fruit company)
- A preamble to adding support for nested virtualization to KVM,
including vEL2 register state, rudimentary nested exception
handling and masking unsupported features for nested guests
- Fixes to the PSCI relay that avoid an unexpected host SVE trap when
resuming a CPU when running pKVM
- VGIC maintenance interrupt support for the AIC
- Improvements to the arch timer emulation, primarily aimed at
reducing the trap overhead of running nested
- Add CONFIG_USERFAULTFD to the KVM selftests config fragment in the
interest of CI systems
- Avoid VM-wide stop-the-world operations when a vCPU accesses its
own redistributor
- Serialize when toggling CPACR_EL1.SMEN to avoid unexpected
exceptions in the host
- Aesthetic and comment/kerneldoc fixes
- Drop the vestiges of the old Columbia mailing list and add [Oliver]
as co-maintainer
RISC-V:
- Fix wrong usage of PGDIR_SIZE instead of PUD_SIZE
- Correctly place the guest in S-mode after redirecting a trap to the
guest
- Redirect illegal instruction traps to guest
- SBI PMU support for guest
s390:
- Sort out confusion between virtual and physical addresses, which
currently are the same on s390
- A new ioctl that performs cmpxchg on guest memory
- A few fixes
x86:
- Change tdp_mmu to a read-only parameter
- Separate TDP and shadow MMU page fault paths
- Enable Hyper-V invariant TSC control
- Fix a variety of APICv and AVIC bugs, some of them real-world, some
of them affecting architecurally legal but unlikely to happen in
practice
- Mark APIC timer as expired if its in one-shot mode and the count
underflows while the vCPU task was being migrated
- Advertise support for Intel's new fast REP string features
- Fix a double-shootdown issue in the emergency reboot code
- Ensure GIF=1 and disable SVM during an emergency reboot, i.e. give
SVM similar treatment to VMX
- Update Xen's TSC info CPUID sub-leaves as appropriate
- Add support for Hyper-V's extended hypercalls, where "support" at
this point is just forwarding the hypercalls to userspace
- Clean up the kvm->lock vs. kvm->srcu sequences when updating the
PMU and MSR filters
- One-off fixes and cleanups
- Fix and cleanup the range-based TLB flushing code, used when KVM is
running on Hyper-V
- Add support for filtering PMU events using a mask. If userspace
wants to restrict heavily what events the guest can use, it can now
do so without needing an absurd number of filter entries
- Clean up KVM's handling of "PMU MSRs to save", especially when vPMU
support is disabled
- Add PEBS support for Intel Sapphire Rapids
- Fix a mostly benign overflow bug in SEV's
send|receive_update_data()
- Move several SVM-specific flags into vcpu_svm
x86 Intel:
- Handle NMI VM-Exits before leaving the noinstr region
- A few trivial cleanups in the VM-Enter flows
- Stop enabling VMFUNC for L1 purely to document that KVM doesn't
support EPTP switching (or any other VM function) for L1
- Fix a crash when using eVMCS's enlighted MSR bitmaps
Generic:
- Clean up the hardware enable and initialization flow, which was
scattered around multiple arch-specific hooks. Instead, just let
the arch code call into generic code. Both x86 and ARM should
benefit from not having to fight common KVM code's notion of how to
do initialization
- Account allocations in generic kvm_arch_alloc_vm()
- Fix a memory leak if coalesced MMIO unregistration fails
selftests:
- On x86, cache the CPU vendor (AMD vs. Intel) and use the info to
emit the correct hypercall instruction instead of relying on KVM to
patch in VMMCALL
- Use TAP interface for kvm_binary_stats_test and tsc_msrs_test"
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (325 commits)
KVM: SVM: hyper-v: placate modpost section mismatch error
KVM: x86/mmu: Make tdp_mmu_allowed static
KVM: arm64: nv: Use reg_to_encoding() to get sysreg ID
KVM: arm64: nv: Only toggle cache for virtual EL2 when SCTLR_EL2 changes
KVM: arm64: nv: Filter out unsupported features from ID regs
KVM: arm64: nv: Emulate EL12 register accesses from the virtual EL2
KVM: arm64: nv: Allow a sysreg to be hidden from userspace only
KVM: arm64: nv: Emulate PSTATE.M for a guest hypervisor
KVM: arm64: nv: Add accessors for SPSR_EL1, ELR_EL1 and VBAR_EL1 from virtual EL2
KVM: arm64: nv: Handle SMCs taken from virtual EL2
KVM: arm64: nv: Handle trapped ERET from virtual EL2
KVM: arm64: nv: Inject HVC exceptions to the virtual EL2
KVM: arm64: nv: Support virtual EL2 exceptions
KVM: arm64: nv: Handle HCR_EL2.NV system register traps
KVM: arm64: nv: Add nested virt VCPU primitives for vEL2 VCPU state
KVM: arm64: nv: Add EL2 system registers to vcpu context
KVM: arm64: nv: Allow userspace to set PSR_MODE_EL2x
KVM: arm64: nv: Reset VCPU to EL2 registers if VCPU nested virt is set
KVM: arm64: nv: Introduce nested virtualization VCPU feature
KVM: arm64: Use the S2 MMU context to iterate over S2 table
...
|
||
|---|---|---|
| .. | ||
| alphascale_asm9260-icoll.h | ||
| exynos-combiner.c | ||
| irq-al-fic.c | ||
| irq-alpine-msi.c | ||
| irq-apple-aic.c | ||
| irq-armada-370-xp.c | ||
| irq-aspeed-i2c-ic.c | ||
| irq-aspeed-scu-ic.c | ||
| irq-aspeed-vic.c | ||
| irq-ath79-cpu.c | ||
| irq-ath79-misc.c | ||
| irq-atmel-aic5.c | ||
| irq-atmel-aic-common.c | ||
| irq-atmel-aic-common.h | ||
| irq-atmel-aic.c | ||
| irq-bcm2835.c | ||
| irq-bcm2836.c | ||
| irq-bcm6345-l1.c | ||
| irq-bcm7038-l1.c | ||
| irq-bcm7120-l2.c | ||
| irq-brcmstb-l2.c | ||
| irq-clps711x.c | ||
| irq-crossbar.c | ||
| irq-csky-apb-intc.c | ||
| irq-csky-mpintc.c | ||
| irq-davinci-cp-intc.c | ||
| irq-digicolor.c | ||
| irq-dw-apb-ictl.c | ||
| irq-ftintc010.c | ||
| irq-gic-common.c | ||
| irq-gic-common.h | ||
| irq-gic-pm.c | ||
| irq-gic-realview.c | ||
| irq-gic-v2m.c | ||
| irq-gic-v3-its-fsl-mc-msi.c | ||
| irq-gic-v3-its-pci-msi.c | ||
| irq-gic-v3-its-platform-msi.c | ||
| irq-gic-v3-its.c | ||
| irq-gic-v3-mbi.c | ||
| irq-gic-v3.c | ||
| irq-gic-v4.c | ||
| irq-gic.c | ||
| irq-goldfish-pic.c | ||
| irq-hip04.c | ||
| irq-i8259.c | ||
| irq-idt3243x.c | ||
| irq-imgpdc.c | ||
| irq-imx-gpcv2.c | ||
| irq-imx-intmux.c | ||
| irq-imx-irqsteer.c | ||
| irq-imx-mu-msi.c | ||
| irq-ingenic-tcu.c | ||
| irq-ingenic.c | ||
| irq-ixp4xx.c | ||
| irq-jcore-aic.c | ||
| irq-keystone.c | ||
| irq-loongarch-cpu.c | ||
| irq-loongson-eiointc.c | ||
| irq-loongson-htpic.c | ||
| irq-loongson-htvec.c | ||
| irq-loongson-liointc.c | ||
| irq-loongson-pch-lpc.c | ||
| irq-loongson-pch-msi.c | ||
| irq-loongson-pch-pic.c | ||
| irq-lpc32xx.c | ||
| irq-ls1x.c | ||
| irq-ls-extirq.c | ||
| irq-ls-scfg-msi.c | ||
| irq-madera.c | ||
| irq-mbigen.c | ||
| irq-mchp-eic.c | ||
| irq-meson-gpio.c | ||
| irq-mips-cpu.c | ||
| irq-mips-gic.c | ||
| irq-mmp.c | ||
| irq-mscc-ocelot.c | ||
| irq-mst-intc.c | ||
| irq-mtk-cirq.c | ||
| irq-mtk-sysirq.c | ||
| irq-mvebu-gicp.c | ||
| irq-mvebu-icu.c | ||
| irq-mvebu-odmi.c | ||
| irq-mvebu-pic.c | ||
| irq-mvebu-sei.c | ||
| irq-mxs.c | ||
| irq-nvic.c | ||
| irq-omap-intc.c | ||
| irq-ompic.c | ||
| irq-or1k-pic.c | ||
| irq-orion.c | ||
| irq-owl-sirq.c | ||
| irq-partition-percpu.c | ||
| irq-pic32-evic.c | ||
| irq-pruss-intc.c | ||
| irq-qcom-mpm.c | ||
| irq-rda-intc.c | ||
| irq-realtek-rtl.c | ||
| irq-renesas-intc-irqpin.c | ||
| irq-renesas-irqc.c | ||
| irq-renesas-rza1.c | ||
| irq-renesas-rzg2l.c | ||
| irq-riscv-intc.c | ||
| irq-sa11x0.c | ||
| irq-sifive-plic.c | ||
| irq-sl28cpld.c | ||
| irq-sni-exiu.c | ||
| irq-sp7021-intc.c | ||
| irq-st.c | ||
| irq-stm32-exti.c | ||
| irq-sun4i.c | ||
| irq-sun6i-r.c | ||
| irq-sunxi-nmi.c | ||
| irq-tb10x.c | ||
| irq-tegra.c | ||
| irq-ti-sci-inta.c | ||
| irq-ti-sci-intr.c | ||
| irq-ts4800.c | ||
| irq-uniphier-aidet.c | ||
| irq-versatile-fpga.c | ||
| irq-vf610-mscm-ir.c | ||
| irq-vic.c | ||
| irq-vt8500.c | ||
| irq-wpcm450-aic.c | ||
| irq-xilinx-intc.c | ||
| irq-xtensa-mx.c | ||
| irq-xtensa-pic.c | ||
| irq-zevio.c | ||
| irqchip.c | ||
| Kconfig | ||
| Makefile | ||
| qcom-irq-combiner.c | ||
| qcom-pdc.c | ||
| spear-shirq.c | ||