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8546dc1d4b
Pull ARM updates from Russell King: "The major items included in here are: - MCPM, multi-cluster power management, part of the infrastructure required for ARMs big.LITTLE support. - A rework of the ARM KVM code to allow re-use by ARM64. - Error handling cleanups of the IS_ERR_OR_NULL() madness and fixes of that stuff for arch/arm - Preparatory patches for Cortex-M3 support from Uwe Kleine-König. There is also a set of three patches in here from Hugh/Catalin to address freeing of inappropriate page tables on LPAE. You already have these from akpm, but they were already part of my tree at the time he sent them, so unfortunately they'll end up with duplicate commits" * 'for-linus' of git://git.linaro.org/people/rmk/linux-arm: (77 commits) ARM: EXYNOS: remove unnecessary use of IS_ERR_VALUE() ARM: IMX: remove unnecessary use of IS_ERR_VALUE() ARM: OMAP: use consistent error checking ARM: cleanup: OMAP hwmod error checking ARM: 7709/1: mcpm: Add explicit AFLAGS to support v6/v7 multiplatform kernels ARM: 7700/2: Make cpu_init() notrace ARM: 7702/1: Set the page table freeing ceiling to TASK_SIZE ARM: 7701/1: mm: Allow arch code to control the user page table ceiling ARM: 7703/1: Disable preemption in broadcast_tlb*_a15_erratum() ARM: mcpm: provide an interface to set the SMP ops at run time ARM: mcpm: generic SMP secondary bringup and hotplug support ARM: mcpm_head.S: vlock-based first man election ARM: mcpm: Add baremetal voting mutexes ARM: mcpm: introduce helpers for platform coherency exit/setup ARM: mcpm: introduce the CPU/cluster power API ARM: multi-cluster PM: secondary kernel entry code ARM: cacheflush: add synchronization helpers for mixed cache state accesses ARM: cpu hotplug: remove majority of cache flushing from platforms ARM: smp: flush L1 cache in cpu_die() ARM: tegra: remove tegra specific cpu_disable() ...
746 lines
17 KiB
C
746 lines
17 KiB
C
/*
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* linux/arch/arm/kernel/smp.c
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*
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* Copyright (C) 2002 ARM Limited, All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/spinlock.h>
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#include <linux/sched.h>
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#include <linux/interrupt.h>
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#include <linux/cache.h>
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#include <linux/profile.h>
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#include <linux/errno.h>
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#include <linux/mm.h>
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#include <linux/err.h>
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#include <linux/cpu.h>
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#include <linux/seq_file.h>
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#include <linux/irq.h>
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#include <linux/percpu.h>
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#include <linux/clockchips.h>
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#include <linux/completion.h>
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#include <linux/cpufreq.h>
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#include <linux/atomic.h>
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#include <asm/smp.h>
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#include <asm/cacheflush.h>
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#include <asm/cpu.h>
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#include <asm/cputype.h>
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#include <asm/exception.h>
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#include <asm/idmap.h>
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#include <asm/topology.h>
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#include <asm/mmu_context.h>
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#include <asm/pgtable.h>
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#include <asm/pgalloc.h>
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#include <asm/processor.h>
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#include <asm/sections.h>
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#include <asm/tlbflush.h>
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#include <asm/ptrace.h>
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#include <asm/localtimer.h>
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#include <asm/smp_plat.h>
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#include <asm/virt.h>
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#include <asm/mach/arch.h>
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/*
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* as from 2.5, kernels no longer have an init_tasks structure
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* so we need some other way of telling a new secondary core
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* where to place its SVC stack
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*/
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struct secondary_data secondary_data;
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/*
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* control for which core is the next to come out of the secondary
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* boot "holding pen"
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*/
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volatile int __cpuinitdata pen_release = -1;
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enum ipi_msg_type {
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IPI_WAKEUP,
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IPI_TIMER,
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IPI_RESCHEDULE,
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IPI_CALL_FUNC,
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IPI_CALL_FUNC_SINGLE,
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IPI_CPU_STOP,
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};
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static DECLARE_COMPLETION(cpu_running);
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static struct smp_operations smp_ops;
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void __init smp_set_ops(struct smp_operations *ops)
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{
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if (ops)
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smp_ops = *ops;
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};
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int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *idle)
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{
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int ret;
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/*
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* We need to tell the secondary core where to find
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* its stack and the page tables.
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*/
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secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
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secondary_data.pgdir = virt_to_phys(idmap_pgd);
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secondary_data.swapper_pg_dir = virt_to_phys(swapper_pg_dir);
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__cpuc_flush_dcache_area(&secondary_data, sizeof(secondary_data));
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outer_clean_range(__pa(&secondary_data), __pa(&secondary_data + 1));
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/*
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* Now bring the CPU into our world.
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*/
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ret = boot_secondary(cpu, idle);
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if (ret == 0) {
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/*
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* CPU was successfully started, wait for it
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* to come online or time out.
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*/
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wait_for_completion_timeout(&cpu_running,
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msecs_to_jiffies(1000));
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if (!cpu_online(cpu)) {
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pr_crit("CPU%u: failed to come online\n", cpu);
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ret = -EIO;
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}
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} else {
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pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
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}
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secondary_data.stack = NULL;
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secondary_data.pgdir = 0;
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return ret;
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}
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/* platform specific SMP operations */
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void __init smp_init_cpus(void)
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{
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if (smp_ops.smp_init_cpus)
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smp_ops.smp_init_cpus();
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}
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int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
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{
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if (smp_ops.smp_boot_secondary)
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return smp_ops.smp_boot_secondary(cpu, idle);
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return -ENOSYS;
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}
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#ifdef CONFIG_HOTPLUG_CPU
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static void percpu_timer_stop(void);
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static int platform_cpu_kill(unsigned int cpu)
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{
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if (smp_ops.cpu_kill)
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return smp_ops.cpu_kill(cpu);
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return 1;
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}
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static int platform_cpu_disable(unsigned int cpu)
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{
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if (smp_ops.cpu_disable)
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return smp_ops.cpu_disable(cpu);
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/*
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* By default, allow disabling all CPUs except the first one,
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* since this is special on a lot of platforms, e.g. because
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* of clock tick interrupts.
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*/
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return cpu == 0 ? -EPERM : 0;
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}
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/*
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* __cpu_disable runs on the processor to be shutdown.
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*/
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int __cpuinit __cpu_disable(void)
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{
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unsigned int cpu = smp_processor_id();
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int ret;
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ret = platform_cpu_disable(cpu);
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if (ret)
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return ret;
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/*
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* Take this CPU offline. Once we clear this, we can't return,
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* and we must not schedule until we're ready to give up the cpu.
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*/
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set_cpu_online(cpu, false);
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/*
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* OK - migrate IRQs away from this CPU
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*/
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migrate_irqs();
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/*
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* Stop the local timer for this CPU.
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*/
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percpu_timer_stop();
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/*
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* Flush user cache and TLB mappings, and then remove this CPU
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* from the vm mask set of all processes.
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*
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* Caches are flushed to the Level of Unification Inner Shareable
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* to write-back dirty lines to unified caches shared by all CPUs.
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*/
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flush_cache_louis();
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local_flush_tlb_all();
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clear_tasks_mm_cpumask(cpu);
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return 0;
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}
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static DECLARE_COMPLETION(cpu_died);
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/*
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* called on the thread which is asking for a CPU to be shutdown -
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* waits until shutdown has completed, or it is timed out.
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*/
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void __cpuinit __cpu_die(unsigned int cpu)
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{
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if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) {
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pr_err("CPU%u: cpu didn't die\n", cpu);
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return;
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}
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printk(KERN_NOTICE "CPU%u: shutdown\n", cpu);
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/*
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* platform_cpu_kill() is generally expected to do the powering off
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* and/or cutting of clocks to the dying CPU. Optionally, this may
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* be done by the CPU which is dying in preference to supporting
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* this call, but that means there is _no_ synchronisation between
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* the requesting CPU and the dying CPU actually losing power.
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*/
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if (!platform_cpu_kill(cpu))
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printk("CPU%u: unable to kill\n", cpu);
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}
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/*
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* Called from the idle thread for the CPU which has been shutdown.
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*
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* Note that we disable IRQs here, but do not re-enable them
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* before returning to the caller. This is also the behaviour
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* of the other hotplug-cpu capable cores, so presumably coming
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* out of idle fixes this.
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*/
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void __ref cpu_die(void)
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{
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unsigned int cpu = smp_processor_id();
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idle_task_exit();
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local_irq_disable();
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/*
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* Flush the data out of the L1 cache for this CPU. This must be
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* before the completion to ensure that data is safely written out
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* before platform_cpu_kill() gets called - which may disable
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* *this* CPU and power down its cache.
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*/
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flush_cache_louis();
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/*
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* Tell __cpu_die() that this CPU is now safe to dispose of. Once
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* this returns, power and/or clocks can be removed at any point
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* from this CPU and its cache by platform_cpu_kill().
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*/
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RCU_NONIDLE(complete(&cpu_died));
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/*
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* Ensure that the cache lines associated with that completion are
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* written out. This covers the case where _this_ CPU is doing the
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* powering down, to ensure that the completion is visible to the
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* CPU waiting for this one.
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*/
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flush_cache_louis();
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/*
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* The actual CPU shutdown procedure is at least platform (if not
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* CPU) specific. This may remove power, or it may simply spin.
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*
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* Platforms are generally expected *NOT* to return from this call,
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* although there are some which do because they have no way to
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* power down the CPU. These platforms are the _only_ reason we
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* have a return path which uses the fragment of assembly below.
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*
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* The return path should not be used for platforms which can
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* power off the CPU.
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*/
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if (smp_ops.cpu_die)
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smp_ops.cpu_die(cpu);
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/*
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* Do not return to the idle loop - jump back to the secondary
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* cpu initialisation. There's some initialisation which needs
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* to be repeated to undo the effects of taking the CPU offline.
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*/
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__asm__("mov sp, %0\n"
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" mov fp, #0\n"
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" b secondary_start_kernel"
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:
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: "r" (task_stack_page(current) + THREAD_SIZE - 8));
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}
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#endif /* CONFIG_HOTPLUG_CPU */
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/*
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* Called by both boot and secondaries to move global data into
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* per-processor storage.
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*/
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static void __cpuinit smp_store_cpu_info(unsigned int cpuid)
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{
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struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid);
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cpu_info->loops_per_jiffy = loops_per_jiffy;
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cpu_info->cpuid = read_cpuid_id();
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store_cpu_topology(cpuid);
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}
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static void percpu_timer_setup(void);
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/*
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* This is the secondary CPU boot entry. We're using this CPUs
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* idle thread stack, but a set of temporary page tables.
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*/
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asmlinkage void __cpuinit secondary_start_kernel(void)
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{
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struct mm_struct *mm = &init_mm;
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unsigned int cpu;
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/*
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* The identity mapping is uncached (strongly ordered), so
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* switch away from it before attempting any exclusive accesses.
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*/
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cpu_switch_mm(mm->pgd, mm);
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local_flush_bp_all();
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enter_lazy_tlb(mm, current);
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local_flush_tlb_all();
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/*
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* All kernel threads share the same mm context; grab a
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* reference and switch to it.
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*/
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cpu = smp_processor_id();
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atomic_inc(&mm->mm_count);
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current->active_mm = mm;
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cpumask_set_cpu(cpu, mm_cpumask(mm));
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cpu_init();
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printk("CPU%u: Booted secondary processor\n", cpu);
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preempt_disable();
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trace_hardirqs_off();
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/*
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* Give the platform a chance to do its own initialisation.
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*/
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if (smp_ops.smp_secondary_init)
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smp_ops.smp_secondary_init(cpu);
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notify_cpu_starting(cpu);
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calibrate_delay();
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smp_store_cpu_info(cpu);
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/*
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* OK, now it's safe to let the boot CPU continue. Wait for
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* the CPU migration code to notice that the CPU is online
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* before we continue - which happens after __cpu_up returns.
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*/
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set_cpu_online(cpu, true);
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complete(&cpu_running);
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/*
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* Setup the percpu timer for this CPU.
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*/
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percpu_timer_setup();
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local_irq_enable();
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local_fiq_enable();
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/*
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* OK, it's off to the idle thread for us
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*/
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cpu_startup_entry(CPUHP_ONLINE);
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}
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void __init smp_cpus_done(unsigned int max_cpus)
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{
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int cpu;
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unsigned long bogosum = 0;
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for_each_online_cpu(cpu)
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bogosum += per_cpu(cpu_data, cpu).loops_per_jiffy;
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printk(KERN_INFO "SMP: Total of %d processors activated "
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"(%lu.%02lu BogoMIPS).\n",
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num_online_cpus(),
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bogosum / (500000/HZ),
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(bogosum / (5000/HZ)) % 100);
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hyp_mode_check();
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}
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void __init smp_prepare_boot_cpu(void)
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{
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set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
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}
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void __init smp_prepare_cpus(unsigned int max_cpus)
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{
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unsigned int ncores = num_possible_cpus();
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init_cpu_topology();
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smp_store_cpu_info(smp_processor_id());
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/*
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* are we trying to boot more cores than exist?
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*/
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if (max_cpus > ncores)
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max_cpus = ncores;
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if (ncores > 1 && max_cpus) {
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/*
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* Enable the local timer or broadcast device for the
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* boot CPU, but only if we have more than one CPU.
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*/
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percpu_timer_setup();
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/*
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* Initialise the present map, which describes the set of CPUs
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* actually populated at the present time. A platform should
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* re-initialize the map in the platforms smp_prepare_cpus()
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* if present != possible (e.g. physical hotplug).
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*/
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init_cpu_present(cpu_possible_mask);
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/*
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* Initialise the SCU if there are more than one CPU
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* and let them know where to start.
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*/
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if (smp_ops.smp_prepare_cpus)
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smp_ops.smp_prepare_cpus(max_cpus);
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}
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}
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static void (*smp_cross_call)(const struct cpumask *, unsigned int);
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void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
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{
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if (!smp_cross_call)
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smp_cross_call = fn;
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}
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void arch_send_call_function_ipi_mask(const struct cpumask *mask)
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{
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smp_cross_call(mask, IPI_CALL_FUNC);
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}
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void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
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{
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smp_cross_call(mask, IPI_WAKEUP);
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}
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void arch_send_call_function_single_ipi(int cpu)
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{
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smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE);
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}
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static const char *ipi_types[NR_IPI] = {
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#define S(x,s) [x] = s
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S(IPI_WAKEUP, "CPU wakeup interrupts"),
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S(IPI_TIMER, "Timer broadcast interrupts"),
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S(IPI_RESCHEDULE, "Rescheduling interrupts"),
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S(IPI_CALL_FUNC, "Function call interrupts"),
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S(IPI_CALL_FUNC_SINGLE, "Single function call interrupts"),
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S(IPI_CPU_STOP, "CPU stop interrupts"),
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};
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void show_ipi_list(struct seq_file *p, int prec)
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{
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unsigned int cpu, i;
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for (i = 0; i < NR_IPI; i++) {
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seq_printf(p, "%*s%u: ", prec - 1, "IPI", i);
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for_each_online_cpu(cpu)
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seq_printf(p, "%10u ",
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__get_irq_stat(cpu, ipi_irqs[i]));
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seq_printf(p, " %s\n", ipi_types[i]);
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}
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}
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u64 smp_irq_stat_cpu(unsigned int cpu)
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{
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u64 sum = 0;
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int i;
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for (i = 0; i < NR_IPI; i++)
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sum += __get_irq_stat(cpu, ipi_irqs[i]);
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return sum;
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}
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/*
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* Timer (local or broadcast) support
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*/
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static DEFINE_PER_CPU(struct clock_event_device, percpu_clockevent);
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#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
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void tick_broadcast(const struct cpumask *mask)
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{
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smp_cross_call(mask, IPI_TIMER);
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}
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#endif
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static void broadcast_timer_set_mode(enum clock_event_mode mode,
|
|
struct clock_event_device *evt)
|
|
{
|
|
}
|
|
|
|
static void __cpuinit broadcast_timer_setup(struct clock_event_device *evt)
|
|
{
|
|
evt->name = "dummy_timer";
|
|
evt->features = CLOCK_EVT_FEAT_ONESHOT |
|
|
CLOCK_EVT_FEAT_PERIODIC |
|
|
CLOCK_EVT_FEAT_DUMMY;
|
|
evt->rating = 100;
|
|
evt->mult = 1;
|
|
evt->set_mode = broadcast_timer_set_mode;
|
|
|
|
clockevents_register_device(evt);
|
|
}
|
|
|
|
static struct local_timer_ops *lt_ops;
|
|
|
|
#ifdef CONFIG_LOCAL_TIMERS
|
|
int local_timer_register(struct local_timer_ops *ops)
|
|
{
|
|
if (!is_smp() || !setup_max_cpus)
|
|
return -ENXIO;
|
|
|
|
if (lt_ops)
|
|
return -EBUSY;
|
|
|
|
lt_ops = ops;
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
static void __cpuinit percpu_timer_setup(void)
|
|
{
|
|
unsigned int cpu = smp_processor_id();
|
|
struct clock_event_device *evt = &per_cpu(percpu_clockevent, cpu);
|
|
|
|
evt->cpumask = cpumask_of(cpu);
|
|
|
|
if (!lt_ops || lt_ops->setup(evt))
|
|
broadcast_timer_setup(evt);
|
|
}
|
|
|
|
#ifdef CONFIG_HOTPLUG_CPU
|
|
/*
|
|
* The generic clock events code purposely does not stop the local timer
|
|
* on CPU_DEAD/CPU_DEAD_FROZEN hotplug events, so we have to do it
|
|
* manually here.
|
|
*/
|
|
static void percpu_timer_stop(void)
|
|
{
|
|
unsigned int cpu = smp_processor_id();
|
|
struct clock_event_device *evt = &per_cpu(percpu_clockevent, cpu);
|
|
|
|
if (lt_ops)
|
|
lt_ops->stop(evt);
|
|
}
|
|
#endif
|
|
|
|
static DEFINE_RAW_SPINLOCK(stop_lock);
|
|
|
|
/*
|
|
* ipi_cpu_stop - handle IPI from smp_send_stop()
|
|
*/
|
|
static void ipi_cpu_stop(unsigned int cpu)
|
|
{
|
|
if (system_state == SYSTEM_BOOTING ||
|
|
system_state == SYSTEM_RUNNING) {
|
|
raw_spin_lock(&stop_lock);
|
|
printk(KERN_CRIT "CPU%u: stopping\n", cpu);
|
|
dump_stack();
|
|
raw_spin_unlock(&stop_lock);
|
|
}
|
|
|
|
set_cpu_online(cpu, false);
|
|
|
|
local_fiq_disable();
|
|
local_irq_disable();
|
|
|
|
while (1)
|
|
cpu_relax();
|
|
}
|
|
|
|
/*
|
|
* Main handler for inter-processor interrupts
|
|
*/
|
|
asmlinkage void __exception_irq_entry do_IPI(int ipinr, struct pt_regs *regs)
|
|
{
|
|
handle_IPI(ipinr, regs);
|
|
}
|
|
|
|
void handle_IPI(int ipinr, struct pt_regs *regs)
|
|
{
|
|
unsigned int cpu = smp_processor_id();
|
|
struct pt_regs *old_regs = set_irq_regs(regs);
|
|
|
|
if (ipinr < NR_IPI)
|
|
__inc_irq_stat(cpu, ipi_irqs[ipinr]);
|
|
|
|
switch (ipinr) {
|
|
case IPI_WAKEUP:
|
|
break;
|
|
|
|
#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
|
|
case IPI_TIMER:
|
|
irq_enter();
|
|
tick_receive_broadcast();
|
|
irq_exit();
|
|
break;
|
|
#endif
|
|
|
|
case IPI_RESCHEDULE:
|
|
scheduler_ipi();
|
|
break;
|
|
|
|
case IPI_CALL_FUNC:
|
|
irq_enter();
|
|
generic_smp_call_function_interrupt();
|
|
irq_exit();
|
|
break;
|
|
|
|
case IPI_CALL_FUNC_SINGLE:
|
|
irq_enter();
|
|
generic_smp_call_function_single_interrupt();
|
|
irq_exit();
|
|
break;
|
|
|
|
case IPI_CPU_STOP:
|
|
irq_enter();
|
|
ipi_cpu_stop(cpu);
|
|
irq_exit();
|
|
break;
|
|
|
|
default:
|
|
printk(KERN_CRIT "CPU%u: Unknown IPI message 0x%x\n",
|
|
cpu, ipinr);
|
|
break;
|
|
}
|
|
set_irq_regs(old_regs);
|
|
}
|
|
|
|
void smp_send_reschedule(int cpu)
|
|
{
|
|
smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
|
|
}
|
|
|
|
#ifdef CONFIG_HOTPLUG_CPU
|
|
static void smp_kill_cpus(cpumask_t *mask)
|
|
{
|
|
unsigned int cpu;
|
|
for_each_cpu(cpu, mask)
|
|
platform_cpu_kill(cpu);
|
|
}
|
|
#else
|
|
static void smp_kill_cpus(cpumask_t *mask) { }
|
|
#endif
|
|
|
|
void smp_send_stop(void)
|
|
{
|
|
unsigned long timeout;
|
|
struct cpumask mask;
|
|
|
|
cpumask_copy(&mask, cpu_online_mask);
|
|
cpumask_clear_cpu(smp_processor_id(), &mask);
|
|
if (!cpumask_empty(&mask))
|
|
smp_cross_call(&mask, IPI_CPU_STOP);
|
|
|
|
/* Wait up to one second for other CPUs to stop */
|
|
timeout = USEC_PER_SEC;
|
|
while (num_online_cpus() > 1 && timeout--)
|
|
udelay(1);
|
|
|
|
if (num_online_cpus() > 1)
|
|
pr_warning("SMP: failed to stop secondary CPUs\n");
|
|
|
|
smp_kill_cpus(&mask);
|
|
}
|
|
|
|
/*
|
|
* not supported here
|
|
*/
|
|
int setup_profiling_timer(unsigned int multiplier)
|
|
{
|
|
return -EINVAL;
|
|
}
|
|
|
|
#ifdef CONFIG_CPU_FREQ
|
|
|
|
static DEFINE_PER_CPU(unsigned long, l_p_j_ref);
|
|
static DEFINE_PER_CPU(unsigned long, l_p_j_ref_freq);
|
|
static unsigned long global_l_p_j_ref;
|
|
static unsigned long global_l_p_j_ref_freq;
|
|
|
|
static int cpufreq_callback(struct notifier_block *nb,
|
|
unsigned long val, void *data)
|
|
{
|
|
struct cpufreq_freqs *freq = data;
|
|
int cpu = freq->cpu;
|
|
|
|
if (freq->flags & CPUFREQ_CONST_LOOPS)
|
|
return NOTIFY_OK;
|
|
|
|
if (!per_cpu(l_p_j_ref, cpu)) {
|
|
per_cpu(l_p_j_ref, cpu) =
|
|
per_cpu(cpu_data, cpu).loops_per_jiffy;
|
|
per_cpu(l_p_j_ref_freq, cpu) = freq->old;
|
|
if (!global_l_p_j_ref) {
|
|
global_l_p_j_ref = loops_per_jiffy;
|
|
global_l_p_j_ref_freq = freq->old;
|
|
}
|
|
}
|
|
|
|
if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
|
|
(val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
|
|
(val == CPUFREQ_RESUMECHANGE || val == CPUFREQ_SUSPENDCHANGE)) {
|
|
loops_per_jiffy = cpufreq_scale(global_l_p_j_ref,
|
|
global_l_p_j_ref_freq,
|
|
freq->new);
|
|
per_cpu(cpu_data, cpu).loops_per_jiffy =
|
|
cpufreq_scale(per_cpu(l_p_j_ref, cpu),
|
|
per_cpu(l_p_j_ref_freq, cpu),
|
|
freq->new);
|
|
}
|
|
return NOTIFY_OK;
|
|
}
|
|
|
|
static struct notifier_block cpufreq_notifier = {
|
|
.notifier_call = cpufreq_callback,
|
|
};
|
|
|
|
static int __init register_cpufreq_notifier(void)
|
|
{
|
|
return cpufreq_register_notifier(&cpufreq_notifier,
|
|
CPUFREQ_TRANSITION_NOTIFIER);
|
|
}
|
|
core_initcall(register_cpufreq_notifier);
|
|
|
|
#endif
|