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8799ee9f49
On some CPUs, bit 4 of section mappings means "update the cache when written to". On others, this bit is required to be one, and others it's required to be zero. Finally, on ARMv6 and above, setting it turns on "no execute" and prevents speculative prefetches. With all these combinations, no one value fits all CPUs, so we have to pick a value depending on the CPU type, and the area we're mapping. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
60 lines
1.4 KiB
C
60 lines
1.4 KiB
C
/*
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* linux/include/asm-arm/procinfo.h
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*
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* Copyright (C) 1996-1999 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_PROCINFO_H
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#define __ASM_PROCINFO_H
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#ifndef __ASSEMBLY__
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struct cpu_tlb_fns;
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struct cpu_user_fns;
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struct cpu_cache_fns;
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struct processor;
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/*
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* Note! struct processor is always defined if we're
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* using MULTI_CPU, otherwise this entry is unused,
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* but still exists.
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*
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* NOTE! The following structure is defined by assembly
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* language, NOT C code. For more information, check:
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* arch/arm/mm/proc-*.S and arch/arm/kernel/head.S
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*/
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struct proc_info_list {
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unsigned int cpu_val;
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unsigned int cpu_mask;
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unsigned long __cpu_mm_mmu_flags; /* used by head.S */
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unsigned long __cpu_io_mmu_flags; /* used by head.S */
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unsigned long __cpu_flush; /* used by head.S */
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const char *arch_name;
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const char *elf_name;
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unsigned int elf_hwcap;
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const char *cpu_name;
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struct processor *proc;
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struct cpu_tlb_fns *tlb;
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struct cpu_user_fns *user;
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struct cpu_cache_fns *cache;
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};
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extern unsigned int elf_hwcap;
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#endif /* __ASSEMBLY__ */
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#define HWCAP_SWP 1
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#define HWCAP_HALF 2
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#define HWCAP_THUMB 4
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#define HWCAP_26BIT 8 /* Play it safe */
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#define HWCAP_FAST_MULT 16
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#define HWCAP_FPA 32
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#define HWCAP_VFP 64
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#define HWCAP_EDSP 128
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#define HWCAP_JAVA 256
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#endif
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