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Generic register bitfield-based multiplexer that controls the multiplexer producer defined under a parent node. The driver corresponding to parent node provides register read/write capabilities. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
143 lines
3.5 KiB
C
143 lines
3.5 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* MMIO register bitfield-controlled multiplexer driver
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*
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* Copyright (C) 2017 Pengutronix, Philipp Zabel <kernel@pengutronix.de>
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*/
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#include <linux/bitops.h>
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#include <linux/err.h>
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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#include <linux/mux/driver.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/property.h>
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#include <linux/regmap.h>
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static int mux_mmio_set(struct mux_control *mux, int state)
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{
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struct regmap_field **fields = mux_chip_priv(mux->chip);
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return regmap_field_write(fields[mux_control_get_index(mux)], state);
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}
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static const struct mux_control_ops mux_mmio_ops = {
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.set = mux_mmio_set,
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};
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static const struct of_device_id mux_mmio_dt_ids[] = {
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{ .compatible = "mmio-mux", },
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{ .compatible = "reg-mux", },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, mux_mmio_dt_ids);
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static int mux_mmio_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct device_node *np = dev->of_node;
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struct regmap_field **fields;
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struct mux_chip *mux_chip;
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struct regmap *regmap;
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int num_fields;
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int ret;
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int i;
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if (of_device_is_compatible(np, "mmio-mux"))
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regmap = syscon_node_to_regmap(np->parent);
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else
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regmap = dev_get_regmap(dev->parent, NULL) ?: ERR_PTR(-ENODEV);
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if (IS_ERR(regmap)) {
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ret = PTR_ERR(regmap);
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dev_err(dev, "failed to get regmap: %d\n", ret);
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return ret;
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}
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ret = of_property_count_u32_elems(np, "mux-reg-masks");
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if (ret == 0 || ret % 2)
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ret = -EINVAL;
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if (ret < 0) {
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dev_err(dev, "mux-reg-masks property missing or invalid: %d\n",
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ret);
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return ret;
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}
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num_fields = ret / 2;
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mux_chip = devm_mux_chip_alloc(dev, num_fields, num_fields *
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sizeof(*fields));
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if (IS_ERR(mux_chip))
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return PTR_ERR(mux_chip);
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fields = mux_chip_priv(mux_chip);
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for (i = 0; i < num_fields; i++) {
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struct mux_control *mux = &mux_chip->mux[i];
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struct reg_field field;
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s32 idle_state = MUX_IDLE_AS_IS;
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u32 reg, mask;
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int bits;
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ret = of_property_read_u32_index(np, "mux-reg-masks",
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2 * i, ®);
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if (!ret)
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ret = of_property_read_u32_index(np, "mux-reg-masks",
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2 * i + 1, &mask);
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if (ret < 0) {
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dev_err(dev, "bitfield %d: failed to read mux-reg-masks property: %d\n",
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i, ret);
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return ret;
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}
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field.reg = reg;
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field.msb = fls(mask) - 1;
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field.lsb = ffs(mask) - 1;
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if (mask != GENMASK(field.msb, field.lsb)) {
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dev_err(dev, "bitfield %d: invalid mask 0x%x\n",
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i, mask);
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return -EINVAL;
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}
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fields[i] = devm_regmap_field_alloc(dev, regmap, field);
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if (IS_ERR(fields[i])) {
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ret = PTR_ERR(fields[i]);
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dev_err(dev, "bitfield %d: failed allocate: %d\n",
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i, ret);
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return ret;
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}
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bits = 1 + field.msb - field.lsb;
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mux->states = 1 << bits;
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of_property_read_u32_index(np, "idle-states", i,
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(u32 *)&idle_state);
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if (idle_state != MUX_IDLE_AS_IS) {
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if (idle_state < 0 || idle_state >= mux->states) {
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dev_err(dev, "bitfield: %d: out of range idle state %d\n",
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i, idle_state);
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return -EINVAL;
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}
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mux->idle_state = idle_state;
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}
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}
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mux_chip->ops = &mux_mmio_ops;
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return devm_mux_chip_register(dev, mux_chip);
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}
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static struct platform_driver mux_mmio_driver = {
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.driver = {
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.name = "mmio-mux",
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.of_match_table = of_match_ptr(mux_mmio_dt_ids),
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},
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.probe = mux_mmio_probe,
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};
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module_platform_driver(mux_mmio_driver);
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MODULE_DESCRIPTION("MMIO register bitfield-controlled multiplexer driver");
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MODULE_AUTHOR("Philipp Zabel <p.zabel@pengutronix.de>");
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MODULE_LICENSE("GPL v2");
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