Christoffer Dall 1138245ccf KVM: ARM: User space API for getting/setting co-proc registers ... The following three ioctls are implemented: - KVM_GET_REG_LIST - KVM_GET_ONE_REG - KVM_SET_ONE_REG Now we have a table for all the cp15 registers, we can drive a generic API. The register IDs carry the following encoding: ARM registers are mapped using the lower 32 bits. The upper 16 of that is the register group type, or coprocessor number: ARM 32-bit CP15 registers have the following id bit patterns: 0x4002 0000 000F <zero:1> <crn:4> <crm:4> <opc1:4> <opc2:3> ARM 64-bit CP15 registers have the following id bit patterns: 0x4003 0000 000F <zero:1> <zero:4> <crm:4> <opc1:4> <zero:3> For futureproofing, we need to tell QEMU about the CP15 registers the host lets the guest access. It will need this information to restore a current guest on a future CPU or perhaps a future KVM which allow some of these to be changed. We use a separate table for these, as they're only for the userspace API. Reviewed-by: Will Deacon <will.deacon@arm.com> Reviewed-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>		2013-01-23 13:29:14 -05:00
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api.txt	KVM: ARM: User space API for getting/setting co-proc registers	2013-01-23 13:29:14 -05:00
cpuid.txt	KVM: fix cpuid eax for KVM leaf	2012-05-06 15:51:56 +03:00
hypercalls.txt	KVM: Add documentation on hypercalls	2012-08-13 17:39:59 -03:00
locking.txt	KVM: MMU: document mmu-lock and fast page fault	2012-07-11 16:51:23 +03:00
mmu.txt	Documentation: Fix multiple typo in Documentation	2012-03-07 16:08:24 +01:00
msr.txt	KVM: clarify kvmclock documentation	2012-09-17 14:10:23 -03:00
nested-vmx.txt	KVM: nVMX: Documentation	2011-07-12 13:15:22 +03:00
ppc-pv.txt	KVM: Add ppc hypercall documentation	2012-08-13 17:39:59 -03:00
review-checklist.txt	Correct occurrences of	2011-05-06 09:27:55 -07:00
timekeeping.txt