mirror of
https://github.com/torvalds/linux.git
synced 2024-11-18 18:11:56 +00:00
ff1ce0571e
For cpufreq example, it takes 13 steps (25 mV for one step) to increase vddcore from 0.95 V to 1.275 V, and the time of 64 clock cycles at 24 MHz for one step is ~2.67 uS, so the total delay time would be ~34.71 uS. But the current calculation in the driver gives 39 uS. Change the formula to have the addition of 1 be the last step, so that we can get a more precise delay time. For example above, the new formula will give 35 uS. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
263 lines
7.3 KiB
C
263 lines
7.3 KiB
C
/*
|
|
* Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
|
|
*/
|
|
|
|
/*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License as published by
|
|
* the Free Software Foundation; either version 2 of the License, or
|
|
* (at your option) any later version.
|
|
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
|
|
* You should have received a copy of the GNU General Public License along
|
|
* with this program; if not, write to the Free Software Foundation, Inc.,
|
|
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
|
*/
|
|
|
|
#include <linux/slab.h>
|
|
#include <linux/device.h>
|
|
#include <linux/module.h>
|
|
#include <linux/mfd/syscon.h>
|
|
#include <linux/err.h>
|
|
#include <linux/io.h>
|
|
#include <linux/platform_device.h>
|
|
#include <linux/of.h>
|
|
#include <linux/of_address.h>
|
|
#include <linux/regmap.h>
|
|
#include <linux/regulator/driver.h>
|
|
#include <linux/regulator/of_regulator.h>
|
|
|
|
#define LDO_RAMP_UP_UNIT_IN_CYCLES 64 /* 64 cycles per step */
|
|
#define LDO_RAMP_UP_FREQ_IN_MHZ 24 /* cycle based on 24M OSC */
|
|
|
|
struct anatop_regulator {
|
|
const char *name;
|
|
u32 control_reg;
|
|
struct regmap *anatop;
|
|
int vol_bit_shift;
|
|
int vol_bit_width;
|
|
u32 delay_reg;
|
|
int delay_bit_shift;
|
|
int delay_bit_width;
|
|
int min_bit_val;
|
|
int min_voltage;
|
|
int max_voltage;
|
|
struct regulator_desc rdesc;
|
|
struct regulator_init_data *initdata;
|
|
};
|
|
|
|
static int anatop_regmap_set_voltage_sel(struct regulator_dev *reg,
|
|
unsigned selector)
|
|
{
|
|
struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
|
|
|
|
if (!anatop_reg->control_reg)
|
|
return -ENOTSUPP;
|
|
|
|
return regulator_set_voltage_sel_regmap(reg, selector);
|
|
}
|
|
|
|
static int anatop_regmap_set_voltage_time_sel(struct regulator_dev *reg,
|
|
unsigned int old_sel,
|
|
unsigned int new_sel)
|
|
{
|
|
struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
|
|
u32 val;
|
|
int ret = 0;
|
|
|
|
/* check whether need to care about LDO ramp up speed */
|
|
if (anatop_reg->delay_bit_width && new_sel > old_sel) {
|
|
/*
|
|
* the delay for LDO ramp up time is
|
|
* based on the register setting, we need
|
|
* to calculate how many steps LDO need to
|
|
* ramp up, and how much delay needed. (us)
|
|
*/
|
|
regmap_read(anatop_reg->anatop, anatop_reg->delay_reg, &val);
|
|
val = (val >> anatop_reg->delay_bit_shift) &
|
|
((1 << anatop_reg->delay_bit_width) - 1);
|
|
ret = (new_sel - old_sel) * (LDO_RAMP_UP_UNIT_IN_CYCLES <<
|
|
val) / LDO_RAMP_UP_FREQ_IN_MHZ + 1;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int anatop_regmap_get_voltage_sel(struct regulator_dev *reg)
|
|
{
|
|
struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
|
|
|
|
if (!anatop_reg->control_reg)
|
|
return -ENOTSUPP;
|
|
|
|
return regulator_get_voltage_sel_regmap(reg);
|
|
}
|
|
|
|
static struct regulator_ops anatop_rops = {
|
|
.set_voltage_sel = anatop_regmap_set_voltage_sel,
|
|
.set_voltage_time_sel = anatop_regmap_set_voltage_time_sel,
|
|
.get_voltage_sel = anatop_regmap_get_voltage_sel,
|
|
.list_voltage = regulator_list_voltage_linear,
|
|
.map_voltage = regulator_map_voltage_linear,
|
|
};
|
|
|
|
static int anatop_regulator_probe(struct platform_device *pdev)
|
|
{
|
|
struct device *dev = &pdev->dev;
|
|
struct device_node *np = dev->of_node;
|
|
struct device_node *anatop_np;
|
|
struct regulator_desc *rdesc;
|
|
struct regulator_dev *rdev;
|
|
struct anatop_regulator *sreg;
|
|
struct regulator_init_data *initdata;
|
|
struct regulator_config config = { };
|
|
int ret = 0;
|
|
|
|
initdata = of_get_regulator_init_data(dev, np);
|
|
sreg = devm_kzalloc(dev, sizeof(*sreg), GFP_KERNEL);
|
|
if (!sreg)
|
|
return -ENOMEM;
|
|
sreg->initdata = initdata;
|
|
sreg->name = kstrdup(of_get_property(np, "regulator-name", NULL),
|
|
GFP_KERNEL);
|
|
rdesc = &sreg->rdesc;
|
|
memset(rdesc, 0, sizeof(*rdesc));
|
|
rdesc->name = sreg->name;
|
|
rdesc->ops = &anatop_rops;
|
|
rdesc->type = REGULATOR_VOLTAGE;
|
|
rdesc->owner = THIS_MODULE;
|
|
|
|
anatop_np = of_get_parent(np);
|
|
if (!anatop_np)
|
|
return -ENODEV;
|
|
sreg->anatop = syscon_node_to_regmap(anatop_np);
|
|
of_node_put(anatop_np);
|
|
if (IS_ERR(sreg->anatop))
|
|
return PTR_ERR(sreg->anatop);
|
|
|
|
ret = of_property_read_u32(np, "anatop-reg-offset",
|
|
&sreg->control_reg);
|
|
if (ret) {
|
|
dev_err(dev, "no anatop-reg-offset property set\n");
|
|
goto anatop_probe_end;
|
|
}
|
|
ret = of_property_read_u32(np, "anatop-vol-bit-width",
|
|
&sreg->vol_bit_width);
|
|
if (ret) {
|
|
dev_err(dev, "no anatop-vol-bit-width property set\n");
|
|
goto anatop_probe_end;
|
|
}
|
|
ret = of_property_read_u32(np, "anatop-vol-bit-shift",
|
|
&sreg->vol_bit_shift);
|
|
if (ret) {
|
|
dev_err(dev, "no anatop-vol-bit-shift property set\n");
|
|
goto anatop_probe_end;
|
|
}
|
|
ret = of_property_read_u32(np, "anatop-min-bit-val",
|
|
&sreg->min_bit_val);
|
|
if (ret) {
|
|
dev_err(dev, "no anatop-min-bit-val property set\n");
|
|
goto anatop_probe_end;
|
|
}
|
|
ret = of_property_read_u32(np, "anatop-min-voltage",
|
|
&sreg->min_voltage);
|
|
if (ret) {
|
|
dev_err(dev, "no anatop-min-voltage property set\n");
|
|
goto anatop_probe_end;
|
|
}
|
|
ret = of_property_read_u32(np, "anatop-max-voltage",
|
|
&sreg->max_voltage);
|
|
if (ret) {
|
|
dev_err(dev, "no anatop-max-voltage property set\n");
|
|
goto anatop_probe_end;
|
|
}
|
|
|
|
/* read LDO ramp up setting, only for core reg */
|
|
of_property_read_u32(np, "anatop-delay-reg-offset",
|
|
&sreg->delay_reg);
|
|
of_property_read_u32(np, "anatop-delay-bit-width",
|
|
&sreg->delay_bit_width);
|
|
of_property_read_u32(np, "anatop-delay-bit-shift",
|
|
&sreg->delay_bit_shift);
|
|
|
|
rdesc->n_voltages = (sreg->max_voltage - sreg->min_voltage) / 25000 + 1
|
|
+ sreg->min_bit_val;
|
|
rdesc->min_uV = sreg->min_voltage;
|
|
rdesc->uV_step = 25000;
|
|
rdesc->linear_min_sel = sreg->min_bit_val;
|
|
rdesc->vsel_reg = sreg->control_reg;
|
|
rdesc->vsel_mask = ((1 << sreg->vol_bit_width) - 1) <<
|
|
sreg->vol_bit_shift;
|
|
|
|
config.dev = &pdev->dev;
|
|
config.init_data = initdata;
|
|
config.driver_data = sreg;
|
|
config.of_node = pdev->dev.of_node;
|
|
config.regmap = sreg->anatop;
|
|
|
|
/* register regulator */
|
|
rdev = regulator_register(rdesc, &config);
|
|
if (IS_ERR(rdev)) {
|
|
dev_err(dev, "failed to register %s\n",
|
|
rdesc->name);
|
|
ret = PTR_ERR(rdev);
|
|
goto anatop_probe_end;
|
|
}
|
|
|
|
platform_set_drvdata(pdev, rdev);
|
|
|
|
anatop_probe_end:
|
|
if (ret)
|
|
kfree(sreg->name);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int anatop_regulator_remove(struct platform_device *pdev)
|
|
{
|
|
struct regulator_dev *rdev = platform_get_drvdata(pdev);
|
|
struct anatop_regulator *sreg = rdev_get_drvdata(rdev);
|
|
const char *name = sreg->name;
|
|
|
|
regulator_unregister(rdev);
|
|
kfree(name);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct of_device_id of_anatop_regulator_match_tbl[] = {
|
|
{ .compatible = "fsl,anatop-regulator", },
|
|
{ /* end */ }
|
|
};
|
|
|
|
static struct platform_driver anatop_regulator_driver = {
|
|
.driver = {
|
|
.name = "anatop_regulator",
|
|
.owner = THIS_MODULE,
|
|
.of_match_table = of_anatop_regulator_match_tbl,
|
|
},
|
|
.probe = anatop_regulator_probe,
|
|
.remove = anatop_regulator_remove,
|
|
};
|
|
|
|
static int __init anatop_regulator_init(void)
|
|
{
|
|
return platform_driver_register(&anatop_regulator_driver);
|
|
}
|
|
postcore_initcall(anatop_regulator_init);
|
|
|
|
static void __exit anatop_regulator_exit(void)
|
|
{
|
|
platform_driver_unregister(&anatop_regulator_driver);
|
|
}
|
|
module_exit(anatop_regulator_exit);
|
|
|
|
MODULE_AUTHOR("Nancy Chen <Nancy.Chen@freescale.com>, "
|
|
"Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>");
|
|
MODULE_DESCRIPTION("ANATOP Regulator driver");
|
|
MODULE_LICENSE("GPL v2");
|