mirror of
https://github.com/torvalds/linux.git
synced 2024-11-14 08:02:07 +00:00
10dc374766
but lots of architecture-specific changes. * ARM: - VHE support so that we can run the kernel at EL2 on ARMv8.1 systems - PMU support for guests - 32bit world switch rewritten in C - various optimizations to the vgic save/restore code. * PPC: - enabled KVM-VFIO integration ("VFIO device") - optimizations to speed up IPIs between vcpus - in-kernel handling of IOMMU hypercalls - support for dynamic DMA windows (DDW). * s390: - provide the floating point registers via sync regs; - separated instruction vs. data accesses - dirty log improvements for huge guests - bugfixes and documentation improvements. * x86: - Hyper-V VMBus hypercall userspace exit - alternative implementation of lowest-priority interrupts using vector hashing (for better VT-d posted interrupt support) - fixed guest debugging with nested virtualizations - improved interrupt tracking in the in-kernel IOAPIC - generic infrastructure for tracking writes to guest memory---currently its only use is to speedup the legacy shadow paging (pre-EPT) case, but in the future it will be used for virtual GPUs as well - much cleanup (LAPIC, kvmclock, MMU, PIT), including ubsan fixes. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQEcBAABAgAGBQJW5r3BAAoJEL/70l94x66D2pMH/jTSWWwdTUJMctrDjPVzKzG0 yOzHW5vSLFoFlwEOY2VpslnXzn5TUVmCAfrdmFNmQcSw6hGb3K/xA/ZX/KLwWhyb oZpr123ycahga+3q/ht/dFUBCCyWeIVMdsLSFwpobEBzPL0pMgc9joLgdUC6UpWX tmN0LoCAeS7spC4TTiTTpw3gZ/L+aB0B6CXhOMjldb9q/2CsgaGyoVvKA199nk9o Ngu7ImDt7l/x1VJX4/6E/17VHuwqAdUrrnbqerB/2oJ5ixsZsHMGzxQ3sHCmvyJx WG5L00ubB1oAJAs9fBg58Y/MdiWX99XqFhdEfxq4foZEiQuCyxygVvq3JwZTxII= =OUZZ -----END PGP SIGNATURE----- Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm Pull KVM updates from Paolo Bonzini: "One of the largest releases for KVM... Hardly any generic changes, but lots of architecture-specific updates. ARM: - VHE support so that we can run the kernel at EL2 on ARMv8.1 systems - PMU support for guests - 32bit world switch rewritten in C - various optimizations to the vgic save/restore code. PPC: - enabled KVM-VFIO integration ("VFIO device") - optimizations to speed up IPIs between vcpus - in-kernel handling of IOMMU hypercalls - support for dynamic DMA windows (DDW). s390: - provide the floating point registers via sync regs; - separated instruction vs. data accesses - dirty log improvements for huge guests - bugfixes and documentation improvements. x86: - Hyper-V VMBus hypercall userspace exit - alternative implementation of lowest-priority interrupts using vector hashing (for better VT-d posted interrupt support) - fixed guest debugging with nested virtualizations - improved interrupt tracking in the in-kernel IOAPIC - generic infrastructure for tracking writes to guest memory - currently its only use is to speedup the legacy shadow paging (pre-EPT) case, but in the future it will be used for virtual GPUs as well - much cleanup (LAPIC, kvmclock, MMU, PIT), including ubsan fixes" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (217 commits) KVM: x86: remove eager_fpu field of struct kvm_vcpu_arch KVM: x86: disable MPX if host did not enable MPX XSAVE features arm64: KVM: vgic-v3: Only wipe LRs on vcpu exit arm64: KVM: vgic-v3: Reset LRs at boot time arm64: KVM: vgic-v3: Do not save an LR known to be empty arm64: KVM: vgic-v3: Save maintenance interrupt state only if required arm64: KVM: vgic-v3: Avoid accessing ICH registers KVM: arm/arm64: vgic-v2: Make GICD_SGIR quicker to hit KVM: arm/arm64: vgic-v2: Only wipe LRs on vcpu exit KVM: arm/arm64: vgic-v2: Reset LRs at boot time KVM: arm/arm64: vgic-v2: Do not save an LR known to be empty KVM: arm/arm64: vgic-v2: Move GICH_ELRSR saving to its own function KVM: arm/arm64: vgic-v2: Save maintenance interrupt state only if required KVM: arm/arm64: vgic-v2: Avoid accessing GICH registers KVM: s390: allocate only one DMA page per VM KVM: s390: enable STFLE interpretation only if enabled for the guest KVM: s390: wake up when the VCPU cpu timer expires KVM: s390: step the VCPU timer while in enabled wait KVM: s390: protect VCPU cpu timer with a seqcount KVM: s390: step VCPU cpu timer during kvm_run ioctl ...
434 lines
10 KiB
C
434 lines
10 KiB
C
/*
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* Copyright (C) 2012,2013 - ARM Ltd
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*
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* Derived from arch/arm/kvm/guest.c:
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* Copyright (C) 2012 - Virtual Open Systems and Columbia University
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* Author: Christoffer Dall <c.dall@virtualopensystems.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/kvm_host.h>
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#include <linux/module.h>
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#include <linux/vmalloc.h>
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#include <linux/fs.h>
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#include <asm/cputype.h>
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#include <asm/uaccess.h>
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#include <asm/kvm.h>
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#include <asm/kvm_emulate.h>
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#include <asm/kvm_coproc.h>
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#include "trace.h"
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#define VM_STAT(x) { #x, offsetof(struct kvm, stat.x), KVM_STAT_VM }
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#define VCPU_STAT(x) { #x, offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU }
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struct kvm_stats_debugfs_item debugfs_entries[] = {
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VCPU_STAT(hvc_exit_stat),
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VCPU_STAT(wfe_exit_stat),
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VCPU_STAT(wfi_exit_stat),
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VCPU_STAT(mmio_exit_user),
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VCPU_STAT(mmio_exit_kernel),
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VCPU_STAT(exits),
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{ NULL }
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};
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int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
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{
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return 0;
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}
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static u64 core_reg_offset_from_id(u64 id)
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{
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return id & ~(KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK | KVM_REG_ARM_CORE);
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}
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static int get_core_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
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{
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/*
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* Because the kvm_regs structure is a mix of 32, 64 and
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* 128bit fields, we index it as if it was a 32bit
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* array. Hence below, nr_regs is the number of entries, and
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* off the index in the "array".
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*/
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__u32 __user *uaddr = (__u32 __user *)(unsigned long)reg->addr;
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struct kvm_regs *regs = vcpu_gp_regs(vcpu);
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int nr_regs = sizeof(*regs) / sizeof(__u32);
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u32 off;
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/* Our ID is an index into the kvm_regs struct. */
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off = core_reg_offset_from_id(reg->id);
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if (off >= nr_regs ||
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(off + (KVM_REG_SIZE(reg->id) / sizeof(__u32))) >= nr_regs)
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return -ENOENT;
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if (copy_to_user(uaddr, ((u32 *)regs) + off, KVM_REG_SIZE(reg->id)))
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return -EFAULT;
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return 0;
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}
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static int set_core_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
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{
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__u32 __user *uaddr = (__u32 __user *)(unsigned long)reg->addr;
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struct kvm_regs *regs = vcpu_gp_regs(vcpu);
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int nr_regs = sizeof(*regs) / sizeof(__u32);
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__uint128_t tmp;
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void *valp = &tmp;
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u64 off;
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int err = 0;
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/* Our ID is an index into the kvm_regs struct. */
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off = core_reg_offset_from_id(reg->id);
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if (off >= nr_regs ||
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(off + (KVM_REG_SIZE(reg->id) / sizeof(__u32))) >= nr_regs)
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return -ENOENT;
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if (KVM_REG_SIZE(reg->id) > sizeof(tmp))
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return -EINVAL;
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if (copy_from_user(valp, uaddr, KVM_REG_SIZE(reg->id))) {
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err = -EFAULT;
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goto out;
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}
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if (off == KVM_REG_ARM_CORE_REG(regs.pstate)) {
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u32 mode = (*(u32 *)valp) & COMPAT_PSR_MODE_MASK;
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switch (mode) {
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case COMPAT_PSR_MODE_USR:
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case COMPAT_PSR_MODE_FIQ:
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case COMPAT_PSR_MODE_IRQ:
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case COMPAT_PSR_MODE_SVC:
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case COMPAT_PSR_MODE_ABT:
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case COMPAT_PSR_MODE_UND:
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case PSR_MODE_EL0t:
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case PSR_MODE_EL1t:
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case PSR_MODE_EL1h:
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break;
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default:
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err = -EINVAL;
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goto out;
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}
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}
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memcpy((u32 *)regs + off, valp, KVM_REG_SIZE(reg->id));
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out:
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return err;
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}
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int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
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{
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return -EINVAL;
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}
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int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
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{
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return -EINVAL;
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}
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static unsigned long num_core_regs(void)
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{
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return sizeof(struct kvm_regs) / sizeof(__u32);
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}
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/**
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* ARM64 versions of the TIMER registers, always available on arm64
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*/
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#define NUM_TIMER_REGS 3
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static bool is_timer_reg(u64 index)
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{
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switch (index) {
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case KVM_REG_ARM_TIMER_CTL:
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case KVM_REG_ARM_TIMER_CNT:
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case KVM_REG_ARM_TIMER_CVAL:
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return true;
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}
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return false;
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}
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static int copy_timer_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
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{
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if (put_user(KVM_REG_ARM_TIMER_CTL, uindices))
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return -EFAULT;
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uindices++;
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if (put_user(KVM_REG_ARM_TIMER_CNT, uindices))
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return -EFAULT;
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uindices++;
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if (put_user(KVM_REG_ARM_TIMER_CVAL, uindices))
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return -EFAULT;
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return 0;
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}
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static int set_timer_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
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{
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void __user *uaddr = (void __user *)(long)reg->addr;
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u64 val;
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int ret;
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ret = copy_from_user(&val, uaddr, KVM_REG_SIZE(reg->id));
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if (ret != 0)
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return -EFAULT;
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return kvm_arm_timer_set_reg(vcpu, reg->id, val);
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}
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static int get_timer_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
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{
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void __user *uaddr = (void __user *)(long)reg->addr;
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u64 val;
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val = kvm_arm_timer_get_reg(vcpu, reg->id);
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return copy_to_user(uaddr, &val, KVM_REG_SIZE(reg->id)) ? -EFAULT : 0;
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}
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/**
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* kvm_arm_num_regs - how many registers do we present via KVM_GET_ONE_REG
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*
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* This is for all registers.
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*/
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unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu)
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{
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return num_core_regs() + kvm_arm_num_sys_reg_descs(vcpu)
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+ NUM_TIMER_REGS;
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}
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/**
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* kvm_arm_copy_reg_indices - get indices of all registers.
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*
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* We do core registers right here, then we apppend system regs.
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*/
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int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
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{
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unsigned int i;
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const u64 core_reg = KVM_REG_ARM64 | KVM_REG_SIZE_U64 | KVM_REG_ARM_CORE;
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int ret;
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for (i = 0; i < sizeof(struct kvm_regs) / sizeof(__u32); i++) {
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if (put_user(core_reg | i, uindices))
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return -EFAULT;
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uindices++;
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}
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ret = copy_timer_indices(vcpu, uindices);
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if (ret)
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return ret;
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uindices += NUM_TIMER_REGS;
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return kvm_arm_copy_sys_reg_indices(vcpu, uindices);
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}
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int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
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{
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/* We currently use nothing arch-specific in upper 32 bits */
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if ((reg->id & ~KVM_REG_SIZE_MASK) >> 32 != KVM_REG_ARM64 >> 32)
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return -EINVAL;
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/* Register group 16 means we want a core register. */
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if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_CORE)
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return get_core_reg(vcpu, reg);
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if (is_timer_reg(reg->id))
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return get_timer_reg(vcpu, reg);
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return kvm_arm_sys_reg_get_reg(vcpu, reg);
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}
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int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
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{
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/* We currently use nothing arch-specific in upper 32 bits */
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if ((reg->id & ~KVM_REG_SIZE_MASK) >> 32 != KVM_REG_ARM64 >> 32)
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return -EINVAL;
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/* Register group 16 means we set a core register. */
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if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_CORE)
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return set_core_reg(vcpu, reg);
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if (is_timer_reg(reg->id))
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return set_timer_reg(vcpu, reg);
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return kvm_arm_sys_reg_set_reg(vcpu, reg);
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}
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int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
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struct kvm_sregs *sregs)
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{
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return -EINVAL;
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}
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int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
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struct kvm_sregs *sregs)
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{
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return -EINVAL;
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}
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int __attribute_const__ kvm_target_cpu(void)
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{
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unsigned long implementor = read_cpuid_implementor();
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unsigned long part_number = read_cpuid_part_number();
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switch (implementor) {
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case ARM_CPU_IMP_ARM:
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switch (part_number) {
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case ARM_CPU_PART_AEM_V8:
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return KVM_ARM_TARGET_AEM_V8;
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case ARM_CPU_PART_FOUNDATION:
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return KVM_ARM_TARGET_FOUNDATION_V8;
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case ARM_CPU_PART_CORTEX_A53:
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return KVM_ARM_TARGET_CORTEX_A53;
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case ARM_CPU_PART_CORTEX_A57:
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return KVM_ARM_TARGET_CORTEX_A57;
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};
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break;
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case ARM_CPU_IMP_APM:
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switch (part_number) {
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case APM_CPU_PART_POTENZA:
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return KVM_ARM_TARGET_XGENE_POTENZA;
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};
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break;
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};
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/* Return a default generic target */
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return KVM_ARM_TARGET_GENERIC_V8;
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}
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int kvm_vcpu_preferred_target(struct kvm_vcpu_init *init)
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{
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int target = kvm_target_cpu();
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if (target < 0)
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return -ENODEV;
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memset(init, 0, sizeof(*init));
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/*
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* For now, we don't return any features.
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* In future, we might use features to return target
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* specific features available for the preferred
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* target type.
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*/
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init->target = (__u32)target;
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return 0;
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}
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int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
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{
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return -EINVAL;
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}
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int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
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{
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return -EINVAL;
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}
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int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
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struct kvm_translation *tr)
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{
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return -EINVAL;
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}
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#define KVM_GUESTDBG_VALID_MASK (KVM_GUESTDBG_ENABLE | \
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KVM_GUESTDBG_USE_SW_BP | \
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KVM_GUESTDBG_USE_HW | \
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KVM_GUESTDBG_SINGLESTEP)
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/**
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* kvm_arch_vcpu_ioctl_set_guest_debug - set up guest debugging
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* @kvm: pointer to the KVM struct
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* @kvm_guest_debug: the ioctl data buffer
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*
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* This sets up and enables the VM for guest debugging. Userspace
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* passes in a control flag to enable different debug types and
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* potentially other architecture specific information in the rest of
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* the structure.
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*/
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int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
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struct kvm_guest_debug *dbg)
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{
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trace_kvm_set_guest_debug(vcpu, dbg->control);
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if (dbg->control & ~KVM_GUESTDBG_VALID_MASK)
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return -EINVAL;
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if (dbg->control & KVM_GUESTDBG_ENABLE) {
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vcpu->guest_debug = dbg->control;
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/* Hardware assisted Break and Watch points */
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if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW) {
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vcpu->arch.external_debug_state = dbg->arch;
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}
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} else {
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/* If not enabled clear all flags */
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vcpu->guest_debug = 0;
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}
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return 0;
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}
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int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu,
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struct kvm_device_attr *attr)
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{
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int ret;
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switch (attr->group) {
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case KVM_ARM_VCPU_PMU_V3_CTRL:
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ret = kvm_arm_pmu_v3_set_attr(vcpu, attr);
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break;
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default:
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ret = -ENXIO;
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break;
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}
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return ret;
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}
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int kvm_arm_vcpu_arch_get_attr(struct kvm_vcpu *vcpu,
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struct kvm_device_attr *attr)
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{
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int ret;
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switch (attr->group) {
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case KVM_ARM_VCPU_PMU_V3_CTRL:
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ret = kvm_arm_pmu_v3_get_attr(vcpu, attr);
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break;
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default:
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ret = -ENXIO;
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break;
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}
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return ret;
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}
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int kvm_arm_vcpu_arch_has_attr(struct kvm_vcpu *vcpu,
|
|
struct kvm_device_attr *attr)
|
|
{
|
|
int ret;
|
|
|
|
switch (attr->group) {
|
|
case KVM_ARM_VCPU_PMU_V3_CTRL:
|
|
ret = kvm_arm_pmu_v3_has_attr(vcpu, attr);
|
|
break;
|
|
default:
|
|
ret = -ENXIO;
|
|
break;
|
|
}
|
|
|
|
return ret;
|
|
}
|