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The patch adds a one-reg register identifier which can be used to read and set the virtual HASHPKEYR for the guest during enter/exit with KVM_REG_PPC_HASHPKEYR. The specific SPR KVM API documentation too updated. Signed-off-by: Shivaprasad G Bhat <sbhat@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/171759285547.1480.12374595786792346073.stgit@linux.ibm.com
132 lines
4.7 KiB
C
132 lines
4.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Privileged (non-hypervisor) host registers to save.
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*/
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#include "asm/guest-state-buffer.h"
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struct p9_host_os_sprs {
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unsigned long iamr;
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unsigned long amr;
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unsigned int pmc1;
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unsigned int pmc2;
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unsigned int pmc3;
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unsigned int pmc4;
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unsigned int pmc5;
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unsigned int pmc6;
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unsigned long mmcr0;
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unsigned long mmcr1;
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unsigned long mmcr2;
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unsigned long mmcr3;
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unsigned long mmcra;
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unsigned long siar;
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unsigned long sier1;
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unsigned long sier2;
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unsigned long sier3;
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unsigned long sdar;
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};
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static inline bool nesting_enabled(struct kvm *kvm)
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{
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return kvm->arch.nested_enable && kvm_is_radix(kvm);
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}
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bool load_vcpu_state(struct kvm_vcpu *vcpu,
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struct p9_host_os_sprs *host_os_sprs);
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void store_vcpu_state(struct kvm_vcpu *vcpu);
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void save_p9_host_os_sprs(struct p9_host_os_sprs *host_os_sprs);
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void restore_p9_host_os_sprs(struct kvm_vcpu *vcpu,
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struct p9_host_os_sprs *host_os_sprs);
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void switch_pmu_to_guest(struct kvm_vcpu *vcpu,
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struct p9_host_os_sprs *host_os_sprs);
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void switch_pmu_to_host(struct kvm_vcpu *vcpu,
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struct p9_host_os_sprs *host_os_sprs);
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#ifdef CONFIG_KVM_BOOK3S_HV_P9_TIMING
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void accumulate_time(struct kvm_vcpu *vcpu, struct kvmhv_tb_accumulator *next);
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#define start_timing(vcpu, next) accumulate_time(vcpu, next)
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#define end_timing(vcpu) accumulate_time(vcpu, NULL)
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#else
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#define accumulate_time(vcpu, next) do {} while (0)
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#define start_timing(vcpu, next) do {} while (0)
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#define end_timing(vcpu) do {} while (0)
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#endif
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static inline void __kvmppc_set_msr_hv(struct kvm_vcpu *vcpu, u64 val)
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{
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vcpu->arch.shregs.msr = val;
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kvmhv_nestedv2_mark_dirty(vcpu, KVMPPC_GSID_MSR);
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}
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static inline u64 __kvmppc_get_msr_hv(struct kvm_vcpu *vcpu)
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{
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WARN_ON(kvmhv_nestedv2_cached_reload(vcpu, KVMPPC_GSID_MSR) < 0);
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return vcpu->arch.shregs.msr;
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}
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#define KVMPPC_BOOK3S_HV_VCPU_ACCESSOR_SET(reg, size, iden) \
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static inline void kvmppc_set_##reg ##_hv(struct kvm_vcpu *vcpu, u##size val) \
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{ \
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vcpu->arch.reg = val; \
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kvmhv_nestedv2_mark_dirty(vcpu, iden); \
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}
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#define KVMPPC_BOOK3S_HV_VCPU_ACCESSOR_GET(reg, size, iden) \
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static inline u##size kvmppc_get_##reg ##_hv(struct kvm_vcpu *vcpu) \
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{ \
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kvmhv_nestedv2_cached_reload(vcpu, iden); \
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return vcpu->arch.reg; \
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}
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#define KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(reg, size, iden) \
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KVMPPC_BOOK3S_HV_VCPU_ACCESSOR_SET(reg, size, iden) \
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KVMPPC_BOOK3S_HV_VCPU_ACCESSOR_GET(reg, size, iden) \
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#define KVMPPC_BOOK3S_HV_VCPU_ARRAY_ACCESSOR_SET(reg, size, iden) \
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static inline void kvmppc_set_##reg ##_hv(struct kvm_vcpu *vcpu, int i, u##size val) \
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{ \
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vcpu->arch.reg[i] = val; \
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kvmhv_nestedv2_mark_dirty(vcpu, iden(i)); \
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}
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#define KVMPPC_BOOK3S_HV_VCPU_ARRAY_ACCESSOR_GET(reg, size, iden) \
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static inline u##size kvmppc_get_##reg ##_hv(struct kvm_vcpu *vcpu, int i) \
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{ \
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WARN_ON(kvmhv_nestedv2_cached_reload(vcpu, iden(i)) < 0); \
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return vcpu->arch.reg[i]; \
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}
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#define KVMPPC_BOOK3S_HV_VCPU_ARRAY_ACCESSOR(reg, size, iden) \
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KVMPPC_BOOK3S_HV_VCPU_ARRAY_ACCESSOR_SET(reg, size, iden) \
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KVMPPC_BOOK3S_HV_VCPU_ARRAY_ACCESSOR_GET(reg, size, iden) \
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KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(mmcra, 64, KVMPPC_GSID_MMCRA)
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KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(hfscr, 64, KVMPPC_GSID_HFSCR)
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KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(fscr, 64, KVMPPC_GSID_FSCR)
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KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(dscr, 64, KVMPPC_GSID_DSCR)
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KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(purr, 64, KVMPPC_GSID_PURR)
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KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(spurr, 64, KVMPPC_GSID_SPURR)
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KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(amr, 64, KVMPPC_GSID_AMR)
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KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(uamor, 64, KVMPPC_GSID_UAMOR)
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KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(siar, 64, KVMPPC_GSID_SIAR)
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KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(sdar, 64, KVMPPC_GSID_SDAR)
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KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(iamr, 64, KVMPPC_GSID_IAMR)
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KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(dawr0, 64, KVMPPC_GSID_DAWR0)
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KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(dawr1, 64, KVMPPC_GSID_DAWR1)
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KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(dawrx0, 64, KVMPPC_GSID_DAWRX0)
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KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(dawrx1, 64, KVMPPC_GSID_DAWRX1)
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KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(dexcr, 64, KVMPPC_GSID_DEXCR)
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KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(hashkeyr, 64, KVMPPC_GSID_HASHKEYR)
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KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(hashpkeyr, 64, KVMPPC_GSID_HASHPKEYR)
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KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(ciabr, 64, KVMPPC_GSID_CIABR)
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KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(wort, 64, KVMPPC_GSID_WORT)
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KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(ppr, 64, KVMPPC_GSID_PPR)
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KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(ctrl, 64, KVMPPC_GSID_CTRL);
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KVMPPC_BOOK3S_HV_VCPU_ARRAY_ACCESSOR(mmcr, 64, KVMPPC_GSID_MMCR)
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KVMPPC_BOOK3S_HV_VCPU_ARRAY_ACCESSOR(sier, 64, KVMPPC_GSID_SIER)
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KVMPPC_BOOK3S_HV_VCPU_ARRAY_ACCESSOR(pmc, 32, KVMPPC_GSID_PMC)
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KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(pspb, 32, KVMPPC_GSID_PSPB)
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