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linux/arch/mips/alchemy
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Manuel Lauss 0c694de12b MIPS: Alchemy: RTC counter clocksource / clockevent support. 
Add support for the 32 kHz counter1 (RTC) as clocksource / clockevent
device.  As a nice side effect, this also enables use of the 'wait'
instruction for runtime idle power savings.

If the counters aren't enabled/working properly, fall back on the
cp0 counter clock code.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11 09:57:27 +00:00
..
common MIPS: Alchemy: RTC counter clocksource / clockevent support. 2009-01-11 09:57:27 +00:00
devboards MIPS: Alchemy: pb1200: update CPLD cascade irq handler. 2009-01-11 09:57:26 +00:00
mtx-1 MIPS: Alchemy: update core interrupt code. 2009-01-11 09:57:26 +00:00
xxs1500 MIPS: Alchemy: update core interrupt code. 2009-01-11 09:57:26 +00:00
Kconfig MIPS: Alchemy: RTC counter clocksource / clockevent support. 2009-01-11 09:57:27 +00:00