mirror of
https://github.com/torvalds/linux.git
synced 2024-11-17 09:31:50 +00:00
eb647138ac
Rather than forcing GFP flags and DMA mask to be inconsistent, GFP flags should be determined even for the fallback device through dma_alloc_coherent_mask()/dma_alloc_coherent_gfp_flags(). This restores 64-bit behavior as it was prior to commits8965eb1938
and4a367f3a9d
(not sure why there are two of them), where GFP_DMA was forced on for 32-bit, but not for 64-bit, with the slight adjustment that afaict even 32-bit doesn't need this without CONFIG_ISA. Signed-off-by: Jan Beulich <jbeulich@novell.com> Acked-by: Takashi Iwai <tiwai@suse.de> LKML-Reference: <4AF18187020000780001D8AA@vpn.id2.novell.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
165 lines
3.8 KiB
C
165 lines
3.8 KiB
C
#ifndef _ASM_X86_DMA_MAPPING_H
|
|
#define _ASM_X86_DMA_MAPPING_H
|
|
|
|
/*
|
|
* IOMMU interface. See Documentation/PCI/PCI-DMA-mapping.txt and
|
|
* Documentation/DMA-API.txt for documentation.
|
|
*/
|
|
|
|
#include <linux/kmemcheck.h>
|
|
#include <linux/scatterlist.h>
|
|
#include <linux/dma-debug.h>
|
|
#include <linux/dma-attrs.h>
|
|
#include <asm/io.h>
|
|
#include <asm/swiotlb.h>
|
|
#include <asm-generic/dma-coherent.h>
|
|
|
|
#ifdef CONFIG_ISA
|
|
# define ISA_DMA_BIT_MASK DMA_BIT_MASK(24)
|
|
#else
|
|
# define ISA_DMA_BIT_MASK DMA_BIT_MASK(32)
|
|
#endif
|
|
|
|
extern dma_addr_t bad_dma_address;
|
|
extern int iommu_merge;
|
|
extern struct device x86_dma_fallback_dev;
|
|
extern int panic_on_overflow;
|
|
|
|
extern struct dma_map_ops *dma_ops;
|
|
|
|
static inline struct dma_map_ops *get_dma_ops(struct device *dev)
|
|
{
|
|
#ifdef CONFIG_X86_32
|
|
return dma_ops;
|
|
#else
|
|
if (unlikely(!dev) || !dev->archdata.dma_ops)
|
|
return dma_ops;
|
|
else
|
|
return dev->archdata.dma_ops;
|
|
#endif
|
|
}
|
|
|
|
#include <asm-generic/dma-mapping-common.h>
|
|
|
|
/* Make sure we keep the same behaviour */
|
|
static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
|
|
{
|
|
struct dma_map_ops *ops = get_dma_ops(dev);
|
|
if (ops->mapping_error)
|
|
return ops->mapping_error(dev, dma_addr);
|
|
|
|
return (dma_addr == bad_dma_address);
|
|
}
|
|
|
|
#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
|
|
#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
|
|
#define dma_is_consistent(d, h) (1)
|
|
|
|
extern int dma_supported(struct device *hwdev, u64 mask);
|
|
extern int dma_set_mask(struct device *dev, u64 mask);
|
|
|
|
extern void *dma_generic_alloc_coherent(struct device *dev, size_t size,
|
|
dma_addr_t *dma_addr, gfp_t flag);
|
|
|
|
static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
|
|
{
|
|
if (!dev->dma_mask)
|
|
return 0;
|
|
|
|
return addr + size <= *dev->dma_mask;
|
|
}
|
|
|
|
static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
|
|
{
|
|
return paddr;
|
|
}
|
|
|
|
static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
|
|
{
|
|
return daddr;
|
|
}
|
|
|
|
static inline void
|
|
dma_cache_sync(struct device *dev, void *vaddr, size_t size,
|
|
enum dma_data_direction dir)
|
|
{
|
|
flush_write_buffers();
|
|
}
|
|
|
|
static inline int dma_get_cache_alignment(void)
|
|
{
|
|
/* no easy way to get cache size on all x86, so return the
|
|
* maximum possible, to be safe */
|
|
return boot_cpu_data.x86_clflush_size;
|
|
}
|
|
|
|
static inline unsigned long dma_alloc_coherent_mask(struct device *dev,
|
|
gfp_t gfp)
|
|
{
|
|
unsigned long dma_mask = 0;
|
|
|
|
dma_mask = dev->coherent_dma_mask;
|
|
if (!dma_mask)
|
|
dma_mask = (gfp & GFP_DMA) ? DMA_BIT_MASK(24) : DMA_BIT_MASK(32);
|
|
|
|
return dma_mask;
|
|
}
|
|
|
|
static inline gfp_t dma_alloc_coherent_gfp_flags(struct device *dev, gfp_t gfp)
|
|
{
|
|
unsigned long dma_mask = dma_alloc_coherent_mask(dev, gfp);
|
|
|
|
if (dma_mask <= DMA_BIT_MASK(24))
|
|
gfp |= GFP_DMA;
|
|
#ifdef CONFIG_X86_64
|
|
if (dma_mask <= DMA_BIT_MASK(32) && !(gfp & GFP_DMA))
|
|
gfp |= GFP_DMA32;
|
|
#endif
|
|
return gfp;
|
|
}
|
|
|
|
static inline void *
|
|
dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
|
|
gfp_t gfp)
|
|
{
|
|
struct dma_map_ops *ops = get_dma_ops(dev);
|
|
void *memory;
|
|
|
|
gfp &= ~(__GFP_DMA | __GFP_HIGHMEM | __GFP_DMA32);
|
|
|
|
if (dma_alloc_from_coherent(dev, size, dma_handle, &memory))
|
|
return memory;
|
|
|
|
if (!dev)
|
|
dev = &x86_dma_fallback_dev;
|
|
|
|
if (!is_device_dma_capable(dev))
|
|
return NULL;
|
|
|
|
if (!ops->alloc_coherent)
|
|
return NULL;
|
|
|
|
memory = ops->alloc_coherent(dev, size, dma_handle,
|
|
dma_alloc_coherent_gfp_flags(dev, gfp));
|
|
debug_dma_alloc_coherent(dev, size, *dma_handle, memory);
|
|
|
|
return memory;
|
|
}
|
|
|
|
static inline void dma_free_coherent(struct device *dev, size_t size,
|
|
void *vaddr, dma_addr_t bus)
|
|
{
|
|
struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
WARN_ON(irqs_disabled()); /* for portability */
|
|
|
|
if (dma_release_from_coherent(dev, get_order(size), vaddr))
|
|
return;
|
|
|
|
debug_dma_free_coherent(dev, size, vaddr, bus);
|
|
if (ops->free_coherent)
|
|
ops->free_coherent(dev, size, vaddr, bus);
|
|
}
|
|
|
|
#endif
|