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f214d59a06
Read some hpre device configuration info from capability register, instead of fixed macros. Signed-off-by: Zhiqi Song <songzhiqi1@huawei.com> Signed-off-by: Weili Qian <qianweili@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
108 lines
2.2 KiB
C
108 lines
2.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (c) 2019 HiSilicon Limited. */
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#ifndef __HISI_HPRE_H
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#define __HISI_HPRE_H
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#include <linux/list.h>
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#include <linux/hisi_acc_qm.h>
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#define HPRE_SQE_SIZE sizeof(struct hpre_sqe)
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#define HPRE_PF_DEF_Q_NUM 64
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#define HPRE_PF_DEF_Q_BASE 0
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/*
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* type used in qm sqc DW6.
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* 0 - Algorithm which has been supported in V2, like RSA, DH and so on;
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* 1 - ECC algorithm in V3.
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*/
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#define HPRE_V2_ALG_TYPE 0
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#define HPRE_V3_ECC_ALG_TYPE 1
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enum {
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HPRE_CLUSTER0,
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HPRE_CLUSTER1,
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HPRE_CLUSTER2,
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HPRE_CLUSTER3,
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HPRE_CLUSTERS_NUM_MAX
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};
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enum hpre_ctrl_dbgfs_file {
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HPRE_CLEAR_ENABLE,
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HPRE_CLUSTER_CTRL,
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HPRE_DEBUG_FILE_NUM,
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};
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enum hpre_dfx_dbgfs_file {
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HPRE_SEND_CNT,
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HPRE_RECV_CNT,
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HPRE_SEND_FAIL_CNT,
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HPRE_SEND_BUSY_CNT,
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HPRE_OVER_THRHLD_CNT,
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HPRE_OVERTIME_THRHLD,
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HPRE_INVALID_REQ_CNT,
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HPRE_DFX_FILE_NUM
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};
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#define HPRE_DEBUGFS_FILE_NUM (HPRE_DEBUG_FILE_NUM + HPRE_CLUSTERS_NUM_MAX - 1)
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struct hpre_debugfs_file {
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int index;
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enum hpre_ctrl_dbgfs_file type;
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spinlock_t lock;
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struct hpre_debug *debug;
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};
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struct hpre_dfx {
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atomic64_t value;
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enum hpre_dfx_dbgfs_file type;
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};
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/*
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* One HPRE controller has one PF and multiple VFs, some global configurations
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* which PF has need this structure.
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* Just relevant for PF.
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*/
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struct hpre_debug {
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struct hpre_dfx dfx[HPRE_DFX_FILE_NUM];
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struct hpre_debugfs_file files[HPRE_DEBUGFS_FILE_NUM];
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};
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struct hpre {
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struct hisi_qm qm;
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struct hpre_debug debug;
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unsigned long status;
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};
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enum hpre_alg_type {
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HPRE_ALG_NC_NCRT = 0x0,
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HPRE_ALG_NC_CRT = 0x1,
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HPRE_ALG_KG_STD = 0x2,
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HPRE_ALG_KG_CRT = 0x3,
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HPRE_ALG_DH_G2 = 0x4,
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HPRE_ALG_DH = 0x5,
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HPRE_ALG_ECC_MUL = 0xD,
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/* shared by x25519 and x448, but x448 is not supported now */
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HPRE_ALG_CURVE25519_MUL = 0x10,
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};
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struct hpre_sqe {
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__le32 dw0;
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__u8 task_len1;
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__u8 task_len2;
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__u8 mrttest_num;
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__u8 resv1;
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__le64 key;
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__le64 in;
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__le64 out;
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__le16 tag;
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__le16 resv2;
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#define _HPRE_SQE_ALIGN_EXT 7
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__le32 rsvd1[_HPRE_SQE_ALIGN_EXT];
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};
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struct hisi_qp *hpre_create_qp(u8 type);
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int hpre_algs_register(struct hisi_qm *qm);
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void hpre_algs_unregister(struct hisi_qm *qm);
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bool hpre_check_alg_support(struct hisi_qm *qm, u32 alg);
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#endif
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