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6b14e4198c
Using the new current_pt_regs() model, we can remove some trampolines from assembly code and call directly to the C syscall implementations. rt_sigreturn() and clone() still need some assembly wrapping, but no longer are passed a pt_regs pointer. sigaltstack() and the tilepro-specific cmpxchg_badaddr() syscalls are now just straight C. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
908 lines
25 KiB
C
908 lines
25 KiB
C
/*
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* Copyright 2010 Tilera Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for
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* more details.
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*
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* From i386 code copyright (C) 1995 Linus Torvalds
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*/
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include <linux/ptrace.h>
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#include <linux/mman.h>
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#include <linux/mm.h>
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#include <linux/smp.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/tty.h>
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#include <linux/vt_kern.h> /* For unblank_screen() */
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#include <linux/highmem.h>
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#include <linux/module.h>
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#include <linux/kprobes.h>
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#include <linux/hugetlb.h>
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#include <linux/syscalls.h>
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#include <linux/uaccess.h>
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#include <asm/pgalloc.h>
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#include <asm/sections.h>
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#include <asm/traps.h>
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#include <asm/syscalls.h>
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#include <arch/interrupts.h>
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static noinline void force_sig_info_fault(const char *type, int si_signo,
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int si_code, unsigned long address,
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int fault_num,
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struct task_struct *tsk,
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struct pt_regs *regs)
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{
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siginfo_t info;
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if (unlikely(tsk->pid < 2)) {
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panic("Signal %d (code %d) at %#lx sent to %s!",
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si_signo, si_code & 0xffff, address,
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is_idle_task(tsk) ? "the idle task" : "init");
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}
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info.si_signo = si_signo;
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info.si_errno = 0;
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info.si_code = si_code;
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info.si_addr = (void __user *)address;
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info.si_trapno = fault_num;
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trace_unhandled_signal(type, regs, address, si_signo);
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force_sig_info(si_signo, &info, tsk);
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}
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#ifndef __tilegx__
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/*
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* Synthesize the fault a PL0 process would get by doing a word-load of
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* an unaligned address or a high kernel address.
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*/
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SYSCALL_DEFINE1(cmpxchg_badaddr, unsigned long, address)
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{
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struct pt_regs *regs = current_pt_regs();
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if (address >= PAGE_OFFSET)
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force_sig_info_fault("atomic segfault", SIGSEGV, SEGV_MAPERR,
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address, INT_DTLB_MISS, current, regs);
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else
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force_sig_info_fault("atomic alignment fault", SIGBUS,
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BUS_ADRALN, address,
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INT_UNALIGN_DATA, current, regs);
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/*
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* Adjust pc to point at the actual instruction, which is unusual
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* for syscalls normally, but is appropriate when we are claiming
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* that a syscall swint1 caused a page fault or bus error.
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*/
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regs->pc -= 8;
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/*
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* Mark this as a caller-save interrupt, like a normal page fault,
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* so that when we go through the signal handler path we will
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* properly restore r0, r1, and r2 for the signal handler arguments.
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*/
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regs->flags |= PT_FLAGS_CALLER_SAVES;
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return 0;
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}
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#endif
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static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address)
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{
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unsigned index = pgd_index(address);
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pgd_t *pgd_k;
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pud_t *pud, *pud_k;
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pmd_t *pmd, *pmd_k;
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pgd += index;
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pgd_k = init_mm.pgd + index;
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if (!pgd_present(*pgd_k))
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return NULL;
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pud = pud_offset(pgd, address);
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pud_k = pud_offset(pgd_k, address);
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if (!pud_present(*pud_k))
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return NULL;
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pmd = pmd_offset(pud, address);
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pmd_k = pmd_offset(pud_k, address);
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if (!pmd_present(*pmd_k))
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return NULL;
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if (!pmd_present(*pmd)) {
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set_pmd(pmd, *pmd_k);
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arch_flush_lazy_mmu_mode();
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} else
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BUG_ON(pmd_ptfn(*pmd) != pmd_ptfn(*pmd_k));
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return pmd_k;
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}
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/*
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* Handle a fault on the vmalloc area.
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*/
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static inline int vmalloc_fault(pgd_t *pgd, unsigned long address)
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{
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pmd_t *pmd_k;
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pte_t *pte_k;
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/* Make sure we are in vmalloc area */
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if (!(address >= VMALLOC_START && address < VMALLOC_END))
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return -1;
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/*
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* Synchronize this task's top level page-table
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* with the 'reference' page table.
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*/
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pmd_k = vmalloc_sync_one(pgd, address);
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if (!pmd_k)
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return -1;
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if (pmd_huge(*pmd_k))
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return 0; /* support TILE huge_vmap() API */
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pte_k = pte_offset_kernel(pmd_k, address);
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if (!pte_present(*pte_k))
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return -1;
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return 0;
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}
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/* Wait until this PTE has completed migration. */
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static void wait_for_migration(pte_t *pte)
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{
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if (pte_migrating(*pte)) {
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/*
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* Wait until the migrater fixes up this pte.
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* We scale the loop count by the clock rate so we'll wait for
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* a few seconds here.
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*/
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int retries = 0;
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int bound = get_clock_rate();
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while (pte_migrating(*pte)) {
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barrier();
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if (++retries > bound)
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panic("Hit migrating PTE (%#llx) and"
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" page PFN %#lx still migrating",
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pte->val, pte_pfn(*pte));
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}
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}
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}
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/*
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* It's not generally safe to use "current" to get the page table pointer,
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* since we might be running an oprofile interrupt in the middle of a
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* task switch.
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*/
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static pgd_t *get_current_pgd(void)
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{
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HV_Context ctx = hv_inquire_context();
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unsigned long pgd_pfn = ctx.page_table >> PAGE_SHIFT;
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struct page *pgd_page = pfn_to_page(pgd_pfn);
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BUG_ON(PageHighMem(pgd_page));
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return (pgd_t *) __va(ctx.page_table);
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}
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/*
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* We can receive a page fault from a migrating PTE at any time.
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* Handle it by just waiting until the fault resolves.
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*
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* It's also possible to get a migrating kernel PTE that resolves
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* itself during the downcall from hypervisor to Linux. We just check
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* here to see if the PTE seems valid, and if so we retry it.
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*
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* NOTE! We MUST NOT take any locks for this case. We may be in an
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* interrupt or a critical region, and must do as little as possible.
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* Similarly, we can't use atomic ops here, since we may be handling a
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* fault caused by an atomic op access.
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*
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* If we find a migrating PTE while we're in an NMI context, and we're
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* at a PC that has a registered exception handler, we don't wait,
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* since this thread may (e.g.) have been interrupted while migrating
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* its own stack, which would then cause us to self-deadlock.
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*/
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static int handle_migrating_pte(pgd_t *pgd, int fault_num,
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unsigned long address, unsigned long pc,
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int is_kernel_mode, int write)
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{
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pud_t *pud;
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pmd_t *pmd;
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pte_t *pte;
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pte_t pteval;
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if (pgd_addr_invalid(address))
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return 0;
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pgd += pgd_index(address);
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pud = pud_offset(pgd, address);
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if (!pud || !pud_present(*pud))
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return 0;
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pmd = pmd_offset(pud, address);
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if (!pmd || !pmd_present(*pmd))
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return 0;
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pte = pmd_huge_page(*pmd) ? ((pte_t *)pmd) :
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pte_offset_kernel(pmd, address);
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pteval = *pte;
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if (pte_migrating(pteval)) {
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if (in_nmi() && search_exception_tables(pc))
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return 0;
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wait_for_migration(pte);
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return 1;
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}
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if (!is_kernel_mode || !pte_present(pteval))
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return 0;
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if (fault_num == INT_ITLB_MISS) {
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if (pte_exec(pteval))
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return 1;
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} else if (write) {
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if (pte_write(pteval))
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return 1;
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} else {
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if (pte_read(pteval))
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return 1;
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}
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return 0;
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}
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/*
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* This routine is responsible for faulting in user pages.
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* It passes the work off to one of the appropriate routines.
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* It returns true if the fault was successfully handled.
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*/
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static int handle_page_fault(struct pt_regs *regs,
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int fault_num,
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int is_page_fault,
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unsigned long address,
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int write)
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{
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struct task_struct *tsk;
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struct mm_struct *mm;
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struct vm_area_struct *vma;
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unsigned long stack_offset;
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int fault;
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int si_code;
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int is_kernel_mode;
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pgd_t *pgd;
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unsigned int flags;
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/* on TILE, protection faults are always writes */
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if (!is_page_fault)
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write = 1;
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flags = (FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE |
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(write ? FAULT_FLAG_WRITE : 0));
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is_kernel_mode = (EX1_PL(regs->ex1) != USER_PL);
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tsk = validate_current();
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/*
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* Check to see if we might be overwriting the stack, and bail
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* out if so. The page fault code is a relatively likely
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* place to get trapped in an infinite regress, and once we
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* overwrite the whole stack, it becomes very hard to recover.
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*/
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stack_offset = stack_pointer & (THREAD_SIZE-1);
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if (stack_offset < THREAD_SIZE / 8) {
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pr_alert("Potential stack overrun: sp %#lx\n",
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stack_pointer);
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show_regs(regs);
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pr_alert("Killing current process %d/%s\n",
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tsk->pid, tsk->comm);
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do_group_exit(SIGKILL);
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}
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/*
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* Early on, we need to check for migrating PTE entries;
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* see homecache.c. If we find a migrating PTE, we wait until
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* the backing page claims to be done migrating, then we proceed.
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* For kernel PTEs, we rewrite the PTE and return and retry.
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* Otherwise, we treat the fault like a normal "no PTE" fault,
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* rather than trying to patch up the existing PTE.
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*/
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pgd = get_current_pgd();
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if (handle_migrating_pte(pgd, fault_num, address, regs->pc,
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is_kernel_mode, write))
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return 1;
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si_code = SEGV_MAPERR;
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/*
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* We fault-in kernel-space virtual memory on-demand. The
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* 'reference' page table is init_mm.pgd.
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*
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* NOTE! We MUST NOT take any locks for this case. We may
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* be in an interrupt or a critical region, and should
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* only copy the information from the master page table,
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* nothing more.
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*
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* This verifies that the fault happens in kernel space
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* and that the fault was not a protection fault.
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*/
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if (unlikely(address >= TASK_SIZE &&
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!is_arch_mappable_range(address, 0))) {
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if (is_kernel_mode && is_page_fault &&
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vmalloc_fault(pgd, address) >= 0)
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return 1;
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/*
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* Don't take the mm semaphore here. If we fixup a prefetch
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* fault we could otherwise deadlock.
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*/
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mm = NULL; /* happy compiler */
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vma = NULL;
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goto bad_area_nosemaphore;
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}
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/*
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* If we're trying to touch user-space addresses, we must
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* be either at PL0, or else with interrupts enabled in the
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* kernel, so either way we can re-enable interrupts here
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* unless we are doing atomic access to user space with
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* interrupts disabled.
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*/
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if (!(regs->flags & PT_FLAGS_DISABLE_IRQ))
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local_irq_enable();
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mm = tsk->mm;
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/*
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* If we're in an interrupt, have no user context or are running in an
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* atomic region then we must not take the fault.
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*/
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if (in_atomic() || !mm) {
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vma = NULL; /* happy compiler */
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goto bad_area_nosemaphore;
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}
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/*
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* When running in the kernel we expect faults to occur only to
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* addresses in user space. All other faults represent errors in the
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* kernel and should generate an OOPS. Unfortunately, in the case of an
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* erroneous fault occurring in a code path which already holds mmap_sem
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* we will deadlock attempting to validate the fault against the
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* address space. Luckily the kernel only validly references user
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* space from well defined areas of code, which are listed in the
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* exceptions table.
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*
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* As the vast majority of faults will be valid we will only perform
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* the source reference check when there is a possibility of a deadlock.
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* Attempt to lock the address space, if we cannot we then validate the
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* source. If this is invalid we can skip the address space check,
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* thus avoiding the deadlock.
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*/
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if (!down_read_trylock(&mm->mmap_sem)) {
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if (is_kernel_mode &&
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!search_exception_tables(regs->pc)) {
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vma = NULL; /* happy compiler */
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goto bad_area_nosemaphore;
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}
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retry:
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down_read(&mm->mmap_sem);
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}
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vma = find_vma(mm, address);
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if (!vma)
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goto bad_area;
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if (vma->vm_start <= address)
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goto good_area;
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if (!(vma->vm_flags & VM_GROWSDOWN))
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goto bad_area;
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if (regs->sp < PAGE_OFFSET) {
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/*
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* accessing the stack below sp is always a bug.
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*/
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if (address < regs->sp)
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goto bad_area;
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}
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if (expand_stack(vma, address))
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goto bad_area;
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/*
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* Ok, we have a good vm_area for this memory access, so
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* we can handle it..
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*/
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good_area:
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si_code = SEGV_ACCERR;
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if (fault_num == INT_ITLB_MISS) {
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if (!(vma->vm_flags & VM_EXEC))
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goto bad_area;
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} else if (write) {
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#ifdef TEST_VERIFY_AREA
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if (!is_page_fault && regs->cs == KERNEL_CS)
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pr_err("WP fault at "REGFMT"\n", regs->eip);
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#endif
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if (!(vma->vm_flags & VM_WRITE))
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goto bad_area;
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} else {
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if (!is_page_fault || !(vma->vm_flags & VM_READ))
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goto bad_area;
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}
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survive:
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/*
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* If for any reason at all we couldn't handle the fault,
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* make sure we exit gracefully rather than endlessly redo
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* the fault.
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*/
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fault = handle_mm_fault(mm, vma, address, flags);
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if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current))
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return 0;
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if (unlikely(fault & VM_FAULT_ERROR)) {
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if (fault & VM_FAULT_OOM)
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goto out_of_memory;
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else if (fault & VM_FAULT_SIGBUS)
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goto do_sigbus;
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BUG();
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}
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if (flags & FAULT_FLAG_ALLOW_RETRY) {
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if (fault & VM_FAULT_MAJOR)
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tsk->maj_flt++;
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else
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tsk->min_flt++;
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if (fault & VM_FAULT_RETRY) {
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flags &= ~FAULT_FLAG_ALLOW_RETRY;
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flags |= FAULT_FLAG_TRIED;
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/*
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* No need to up_read(&mm->mmap_sem) as we would
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* have already released it in __lock_page_or_retry
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* in mm/filemap.c.
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*/
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goto retry;
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}
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}
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#if CHIP_HAS_TILE_DMA() || CHIP_HAS_SN_PROC()
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/*
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* If this was an asynchronous fault,
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* restart the appropriate engine.
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*/
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switch (fault_num) {
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#if CHIP_HAS_TILE_DMA()
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case INT_DMATLB_MISS:
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case INT_DMATLB_MISS_DWNCL:
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case INT_DMATLB_ACCESS:
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case INT_DMATLB_ACCESS_DWNCL:
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__insn_mtspr(SPR_DMA_CTR, SPR_DMA_CTR__REQUEST_MASK);
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break;
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#endif
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#if CHIP_HAS_SN_PROC()
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case INT_SNITLB_MISS:
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case INT_SNITLB_MISS_DWNCL:
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__insn_mtspr(SPR_SNCTL,
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__insn_mfspr(SPR_SNCTL) &
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~SPR_SNCTL__FRZPROC_MASK);
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break;
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#endif
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}
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#endif
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up_read(&mm->mmap_sem);
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return 1;
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/*
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* Something tried to access memory that isn't in our memory map..
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* Fix it, but check if it's kernel or user first..
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*/
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bad_area:
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up_read(&mm->mmap_sem);
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|
|
bad_area_nosemaphore:
|
|
/* User mode accesses just cause a SIGSEGV */
|
|
if (!is_kernel_mode) {
|
|
/*
|
|
* It's possible to have interrupts off here.
|
|
*/
|
|
local_irq_enable();
|
|
|
|
force_sig_info_fault("segfault", SIGSEGV, si_code, address,
|
|
fault_num, tsk, regs);
|
|
return 0;
|
|
}
|
|
|
|
no_context:
|
|
/* Are we prepared to handle this kernel fault? */
|
|
if (fixup_exception(regs))
|
|
return 0;
|
|
|
|
/*
|
|
* Oops. The kernel tried to access some bad page. We'll have to
|
|
* terminate things with extreme prejudice.
|
|
*/
|
|
|
|
bust_spinlocks(1);
|
|
|
|
/* FIXME: no lookup_address() yet */
|
|
#ifdef SUPPORT_LOOKUP_ADDRESS
|
|
if (fault_num == INT_ITLB_MISS) {
|
|
pte_t *pte = lookup_address(address);
|
|
|
|
if (pte && pte_present(*pte) && !pte_exec_kernel(*pte))
|
|
pr_crit("kernel tried to execute"
|
|
" non-executable page - exploit attempt?"
|
|
" (uid: %d)\n", current->uid);
|
|
}
|
|
#endif
|
|
if (address < PAGE_SIZE)
|
|
pr_alert("Unable to handle kernel NULL pointer dereference\n");
|
|
else
|
|
pr_alert("Unable to handle kernel paging request\n");
|
|
pr_alert(" at virtual address "REGFMT", pc "REGFMT"\n",
|
|
address, regs->pc);
|
|
|
|
show_regs(regs);
|
|
|
|
if (unlikely(tsk->pid < 2)) {
|
|
panic("Kernel page fault running %s!",
|
|
is_idle_task(tsk) ? "the idle task" : "init");
|
|
}
|
|
|
|
/*
|
|
* More FIXME: we should probably copy the i386 here and
|
|
* implement a generic die() routine. Not today.
|
|
*/
|
|
#ifdef SUPPORT_DIE
|
|
die("Oops", regs);
|
|
#endif
|
|
bust_spinlocks(1);
|
|
|
|
do_group_exit(SIGKILL);
|
|
|
|
/*
|
|
* We ran out of memory, or some other thing happened to us that made
|
|
* us unable to handle the page fault gracefully.
|
|
*/
|
|
out_of_memory:
|
|
up_read(&mm->mmap_sem);
|
|
if (is_global_init(tsk)) {
|
|
yield();
|
|
down_read(&mm->mmap_sem);
|
|
goto survive;
|
|
}
|
|
pr_alert("VM: killing process %s\n", tsk->comm);
|
|
if (!is_kernel_mode)
|
|
do_group_exit(SIGKILL);
|
|
goto no_context;
|
|
|
|
do_sigbus:
|
|
up_read(&mm->mmap_sem);
|
|
|
|
/* Kernel mode? Handle exceptions or die */
|
|
if (is_kernel_mode)
|
|
goto no_context;
|
|
|
|
force_sig_info_fault("bus error", SIGBUS, BUS_ADRERR, address,
|
|
fault_num, tsk, regs);
|
|
return 0;
|
|
}
|
|
|
|
#ifndef __tilegx__
|
|
|
|
/* We must release ICS before panicking or we won't get anywhere. */
|
|
#define ics_panic(fmt, ...) do { \
|
|
__insn_mtspr(SPR_INTERRUPT_CRITICAL_SECTION, 0); \
|
|
panic(fmt, __VA_ARGS__); \
|
|
} while (0)
|
|
|
|
/*
|
|
* When we take an ITLB or DTLB fault or access violation in the
|
|
* supervisor while the critical section bit is set, the hypervisor is
|
|
* reluctant to write new values into the EX_CONTEXT_K_x registers,
|
|
* since that might indicate we have not yet squirreled the SPR
|
|
* contents away and can thus safely take a recursive interrupt.
|
|
* Accordingly, the hypervisor passes us the PC via SYSTEM_SAVE_K_2.
|
|
*
|
|
* Note that this routine is called before homecache_tlb_defer_enter(),
|
|
* which means that we can properly unlock any atomics that might
|
|
* be used there (good), but also means we must be very sensitive
|
|
* to not touch any data structures that might be located in memory
|
|
* that could migrate, as we could be entering the kernel on a dataplane
|
|
* cpu that has been deferring kernel TLB updates. This means, for
|
|
* example, that we can't migrate init_mm or its pgd.
|
|
*/
|
|
struct intvec_state do_page_fault_ics(struct pt_regs *regs, int fault_num,
|
|
unsigned long address,
|
|
unsigned long info)
|
|
{
|
|
unsigned long pc = info & ~1;
|
|
int write = info & 1;
|
|
pgd_t *pgd = get_current_pgd();
|
|
|
|
/* Retval is 1 at first since we will handle the fault fully. */
|
|
struct intvec_state state = {
|
|
do_page_fault, fault_num, address, write, 1
|
|
};
|
|
|
|
/* Validate that we are plausibly in the right routine. */
|
|
if ((pc & 0x7) != 0 || pc < PAGE_OFFSET ||
|
|
(fault_num != INT_DTLB_MISS &&
|
|
fault_num != INT_DTLB_ACCESS)) {
|
|
unsigned long old_pc = regs->pc;
|
|
regs->pc = pc;
|
|
ics_panic("Bad ICS page fault args:"
|
|
" old PC %#lx, fault %d/%d at %#lx\n",
|
|
old_pc, fault_num, write, address);
|
|
}
|
|
|
|
/* We might be faulting on a vmalloc page, so check that first. */
|
|
if (fault_num != INT_DTLB_ACCESS && vmalloc_fault(pgd, address) >= 0)
|
|
return state;
|
|
|
|
/*
|
|
* If we faulted with ICS set in sys_cmpxchg, we are providing
|
|
* a user syscall service that should generate a signal on
|
|
* fault. We didn't set up a kernel stack on initial entry to
|
|
* sys_cmpxchg, but instead had one set up by the fault, which
|
|
* (because sys_cmpxchg never releases ICS) came to us via the
|
|
* SYSTEM_SAVE_K_2 mechanism, and thus EX_CONTEXT_K_[01] are
|
|
* still referencing the original user code. We release the
|
|
* atomic lock and rewrite pt_regs so that it appears that we
|
|
* came from user-space directly, and after we finish the
|
|
* fault we'll go back to user space and re-issue the swint.
|
|
* This way the backtrace information is correct if we need to
|
|
* emit a stack dump at any point while handling this.
|
|
*
|
|
* Must match register use in sys_cmpxchg().
|
|
*/
|
|
if (pc >= (unsigned long) sys_cmpxchg &&
|
|
pc < (unsigned long) __sys_cmpxchg_end) {
|
|
#ifdef CONFIG_SMP
|
|
/* Don't unlock before we could have locked. */
|
|
if (pc >= (unsigned long)__sys_cmpxchg_grab_lock) {
|
|
int *lock_ptr = (int *)(regs->regs[ATOMIC_LOCK_REG]);
|
|
__atomic_fault_unlock(lock_ptr);
|
|
}
|
|
#endif
|
|
regs->sp = regs->regs[27];
|
|
}
|
|
|
|
/*
|
|
* We can also fault in the atomic assembly, in which
|
|
* case we use the exception table to do the first-level fixup.
|
|
* We may re-fixup again in the real fault handler if it
|
|
* turns out the faulting address is just bad, and not,
|
|
* for example, migrating.
|
|
*/
|
|
else if (pc >= (unsigned long) __start_atomic_asm_code &&
|
|
pc < (unsigned long) __end_atomic_asm_code) {
|
|
const struct exception_table_entry *fixup;
|
|
#ifdef CONFIG_SMP
|
|
/* Unlock the atomic lock. */
|
|
int *lock_ptr = (int *)(regs->regs[ATOMIC_LOCK_REG]);
|
|
__atomic_fault_unlock(lock_ptr);
|
|
#endif
|
|
fixup = search_exception_tables(pc);
|
|
if (!fixup)
|
|
ics_panic("ICS atomic fault not in table:"
|
|
" PC %#lx, fault %d", pc, fault_num);
|
|
regs->pc = fixup->fixup;
|
|
regs->ex1 = PL_ICS_EX1(KERNEL_PL, 0);
|
|
}
|
|
|
|
/*
|
|
* Now that we have released the atomic lock (if necessary),
|
|
* it's safe to spin if the PTE that caused the fault was migrating.
|
|
*/
|
|
if (fault_num == INT_DTLB_ACCESS)
|
|
write = 1;
|
|
if (handle_migrating_pte(pgd, fault_num, address, pc, 1, write))
|
|
return state;
|
|
|
|
/* Return zero so that we continue on with normal fault handling. */
|
|
state.retval = 0;
|
|
return state;
|
|
}
|
|
|
|
#endif /* !__tilegx__ */
|
|
|
|
/*
|
|
* This routine handles page faults. It determines the address, and the
|
|
* problem, and then passes it handle_page_fault() for normal DTLB and
|
|
* ITLB issues, and for DMA or SN processor faults when we are in user
|
|
* space. For the latter, if we're in kernel mode, we just save the
|
|
* interrupt away appropriately and return immediately. We can't do
|
|
* page faults for user code while in kernel mode.
|
|
*/
|
|
void do_page_fault(struct pt_regs *regs, int fault_num,
|
|
unsigned long address, unsigned long write)
|
|
{
|
|
int is_page_fault;
|
|
|
|
/* This case should have been handled by do_page_fault_ics(). */
|
|
BUG_ON(write & ~1);
|
|
|
|
#if CHIP_HAS_TILE_DMA()
|
|
/*
|
|
* If it's a DMA fault, suspend the transfer while we're
|
|
* handling the miss; we'll restart after it's handled. If we
|
|
* don't suspend, it's possible that this process could swap
|
|
* out and back in, and restart the engine since the DMA is
|
|
* still 'running'.
|
|
*/
|
|
if (fault_num == INT_DMATLB_MISS ||
|
|
fault_num == INT_DMATLB_ACCESS ||
|
|
fault_num == INT_DMATLB_MISS_DWNCL ||
|
|
fault_num == INT_DMATLB_ACCESS_DWNCL) {
|
|
__insn_mtspr(SPR_DMA_CTR, SPR_DMA_CTR__SUSPEND_MASK);
|
|
while (__insn_mfspr(SPR_DMA_USER_STATUS) &
|
|
SPR_DMA_STATUS__BUSY_MASK)
|
|
;
|
|
}
|
|
#endif
|
|
|
|
/* Validate fault num and decide if this is a first-time page fault. */
|
|
switch (fault_num) {
|
|
case INT_ITLB_MISS:
|
|
case INT_DTLB_MISS:
|
|
#if CHIP_HAS_TILE_DMA()
|
|
case INT_DMATLB_MISS:
|
|
case INT_DMATLB_MISS_DWNCL:
|
|
#endif
|
|
#if CHIP_HAS_SN_PROC()
|
|
case INT_SNITLB_MISS:
|
|
case INT_SNITLB_MISS_DWNCL:
|
|
#endif
|
|
is_page_fault = 1;
|
|
break;
|
|
|
|
case INT_DTLB_ACCESS:
|
|
#if CHIP_HAS_TILE_DMA()
|
|
case INT_DMATLB_ACCESS:
|
|
case INT_DMATLB_ACCESS_DWNCL:
|
|
#endif
|
|
is_page_fault = 0;
|
|
break;
|
|
|
|
default:
|
|
panic("Bad fault number %d in do_page_fault", fault_num);
|
|
}
|
|
|
|
#if CHIP_HAS_TILE_DMA() || CHIP_HAS_SN_PROC()
|
|
if (EX1_PL(regs->ex1) != USER_PL) {
|
|
struct async_tlb *async;
|
|
switch (fault_num) {
|
|
#if CHIP_HAS_TILE_DMA()
|
|
case INT_DMATLB_MISS:
|
|
case INT_DMATLB_ACCESS:
|
|
case INT_DMATLB_MISS_DWNCL:
|
|
case INT_DMATLB_ACCESS_DWNCL:
|
|
async = ¤t->thread.dma_async_tlb;
|
|
break;
|
|
#endif
|
|
#if CHIP_HAS_SN_PROC()
|
|
case INT_SNITLB_MISS:
|
|
case INT_SNITLB_MISS_DWNCL:
|
|
async = ¤t->thread.sn_async_tlb;
|
|
break;
|
|
#endif
|
|
default:
|
|
async = NULL;
|
|
}
|
|
if (async) {
|
|
|
|
/*
|
|
* No vmalloc check required, so we can allow
|
|
* interrupts immediately at this point.
|
|
*/
|
|
local_irq_enable();
|
|
|
|
set_thread_flag(TIF_ASYNC_TLB);
|
|
if (async->fault_num != 0) {
|
|
panic("Second async fault %d;"
|
|
" old fault was %d (%#lx/%ld)",
|
|
fault_num, async->fault_num,
|
|
address, write);
|
|
}
|
|
BUG_ON(fault_num == 0);
|
|
async->fault_num = fault_num;
|
|
async->is_fault = is_page_fault;
|
|
async->is_write = write;
|
|
async->address = address;
|
|
return;
|
|
}
|
|
}
|
|
#endif
|
|
|
|
handle_page_fault(regs, fault_num, is_page_fault, address, write);
|
|
}
|
|
|
|
|
|
#if CHIP_HAS_TILE_DMA() || CHIP_HAS_SN_PROC()
|
|
/*
|
|
* Check an async_tlb structure to see if a deferred fault is waiting,
|
|
* and if so pass it to the page-fault code.
|
|
*/
|
|
static void handle_async_page_fault(struct pt_regs *regs,
|
|
struct async_tlb *async)
|
|
{
|
|
if (async->fault_num) {
|
|
/*
|
|
* Clear async->fault_num before calling the page-fault
|
|
* handler so that if we re-interrupt before returning
|
|
* from the function we have somewhere to put the
|
|
* information from the new interrupt.
|
|
*/
|
|
int fault_num = async->fault_num;
|
|
async->fault_num = 0;
|
|
handle_page_fault(regs, fault_num, async->is_fault,
|
|
async->address, async->is_write);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* This routine effectively re-issues asynchronous page faults
|
|
* when we are returning to user space.
|
|
*/
|
|
void do_async_page_fault(struct pt_regs *regs)
|
|
{
|
|
/*
|
|
* Clear thread flag early. If we re-interrupt while processing
|
|
* code here, we will reset it and recall this routine before
|
|
* returning to user space.
|
|
*/
|
|
clear_thread_flag(TIF_ASYNC_TLB);
|
|
|
|
#if CHIP_HAS_TILE_DMA()
|
|
handle_async_page_fault(regs, ¤t->thread.dma_async_tlb);
|
|
#endif
|
|
#if CHIP_HAS_SN_PROC()
|
|
handle_async_page_fault(regs, ¤t->thread.sn_async_tlb);
|
|
#endif
|
|
}
|
|
#endif /* CHIP_HAS_TILE_DMA() || CHIP_HAS_SN_PROC() */
|
|
|
|
|
|
void vmalloc_sync_all(void)
|
|
{
|
|
#ifdef __tilegx__
|
|
/* Currently all L1 kernel pmd's are static and shared. */
|
|
BUG_ON(pgd_index(VMALLOC_END) != pgd_index(VMALLOC_START));
|
|
#else
|
|
/*
|
|
* Note that races in the updates of insync and start aren't
|
|
* problematic: insync can only get set bits added, and updates to
|
|
* start are only improving performance (without affecting correctness
|
|
* if undone).
|
|
*/
|
|
static DECLARE_BITMAP(insync, PTRS_PER_PGD);
|
|
static unsigned long start = PAGE_OFFSET;
|
|
unsigned long address;
|
|
|
|
BUILD_BUG_ON(PAGE_OFFSET & ~PGDIR_MASK);
|
|
for (address = start; address >= PAGE_OFFSET; address += PGDIR_SIZE) {
|
|
if (!test_bit(pgd_index(address), insync)) {
|
|
unsigned long flags;
|
|
struct list_head *pos;
|
|
|
|
spin_lock_irqsave(&pgd_lock, flags);
|
|
list_for_each(pos, &pgd_list)
|
|
if (!vmalloc_sync_one(list_to_pgd(pos),
|
|
address)) {
|
|
/* Must be at first entry in list. */
|
|
BUG_ON(pos != pgd_list.next);
|
|
break;
|
|
}
|
|
spin_unlock_irqrestore(&pgd_lock, flags);
|
|
if (pos != pgd_list.next)
|
|
set_bit(pgd_index(address), insync);
|
|
}
|
|
if (address == start && test_bit(pgd_index(address), insync))
|
|
start = address + PGDIR_SIZE;
|
|
}
|
|
#endif
|
|
}
|