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140 lines
3.3 KiB
ArmAsm
140 lines
3.3 KiB
ArmAsm
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* arch/sh5/vmlinux.lds.S
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*
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* ld script to make ST50 Linux kernel
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*
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* Copyright (C) 2000, 2001 Paolo Alberelli
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*
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* benedict.gaster@superh.com: 2nd May 2002
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* Add definition of empty_zero_page to be the first page of kernel image.
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*
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* benedict.gaster@superh.com: 3rd May 2002
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* Added support for ramdisk, removing statically linked romfs at the same time.
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*
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* lethal@linux-sh.org: 9th May 2003
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* Kill off GLOBAL_NAME() usage and other CDC-isms.
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*
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* lethal@linux-sh.org: 19th May 2003
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* Remove support for ancient toolchains.
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*/
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#include <asm/page.h>
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#include <asm/cache.h>
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#include <asm/thread_info.h>
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#define LOAD_OFFSET CONFIG_CACHED_MEMORY_OFFSET
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#include <asm-generic/vmlinux.lds.h>
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OUTPUT_ARCH(sh:sh5)
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#define C_PHYS(x) AT (ADDR(x) - LOAD_OFFSET)
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ENTRY(__start)
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SECTIONS
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{
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. = CONFIG_CACHED_MEMORY_OFFSET + CONFIG_MEMORY_START + PAGE_SIZE;
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_text = .; /* Text and read-only data */
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text = .; /* Text and read-only data */
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.empty_zero_page : C_PHYS(.empty_zero_page) {
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*(.empty_zero_page)
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} = 0
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.text : C_PHYS(.text) {
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*(.text.head)
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TEXT_TEXT
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*(.text64)
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*(.text..SHmedia32)
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SCHED_TEXT
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LOCK_TEXT
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*(.fixup)
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*(.gnu.warning)
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#ifdef CONFIG_LITTLE_ENDIAN
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} = 0x6ff0fff0
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#else
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} = 0xf0fff06f
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#endif
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/* We likely want __ex_table to be Cache Line aligned */
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. = ALIGN(L1_CACHE_BYTES); /* Exception table */
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__start___ex_table = .;
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__ex_table : C_PHYS(__ex_table) { *(__ex_table) }
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__stop___ex_table = .;
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_etext = .; /* End of text section */
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NOTES
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RODATA
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.data : C_PHYS(.data) { /* Data */
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DATA_DATA
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CONSTRUCTORS
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}
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. = ALIGN(PAGE_SIZE);
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.data.page_aligned : C_PHYS(.data.page_aligned) { *(.data.page_aligned) }
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PERCPU(PAGE_SIZE)
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. = ALIGN(L1_CACHE_BYTES);
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.data.cacheline_aligned : C_PHYS(.data.cacheline_aligned) { *(.data.cacheline_aligned) }
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_edata = .; /* End of data section */
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. = ALIGN(THREAD_SIZE); /* init_task: structure size aligned */
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.data.init_task : C_PHYS(.data.init_task) { *(.data.init_task) }
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. = ALIGN(PAGE_SIZE); /* Init code and data */
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__init_begin = .;
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_sinittext = .;
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.init.text : C_PHYS(.init.text) { *(.init.text) }
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_einittext = .;
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.init.data : C_PHYS(.init.data) { *(.init.data) }
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. = ALIGN(L1_CACHE_BYTES); /* Better if Cache Line aligned */
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__setup_start = .;
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.init.setup : C_PHYS(.init.setup) { *(.init.setup) }
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__setup_end = .;
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__initcall_start = .;
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.initcall.init : C_PHYS(.initcall.init) {
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INITCALLS
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}
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__initcall_end = .;
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__con_initcall_start = .;
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.con_initcall.init : C_PHYS(.con_initcall.init) { *(.con_initcall.init) }
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__con_initcall_end = .;
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SECURITY_INIT
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#ifdef CONFIG_BLK_DEV_INITRD
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__initramfs_start = .;
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.init.ramfs : C_PHYS(.init.ramfs) { *(.init.ramfs) }
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__initramfs_end = .;
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#endif
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. = ALIGN(PAGE_SIZE);
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__init_end = .;
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/* Align to the biggest single data representation, head and tail */
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. = ALIGN(8);
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__bss_start = .; /* BSS */
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.bss : C_PHYS(.bss) {
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*(.bss)
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}
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. = ALIGN(8);
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_end = . ;
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/* Sections to be discarded */
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/DISCARD/ : {
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*(.exit.text)
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*(.exit.data)
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*(.exitcall.exit)
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}
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STABS_DEBUG
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DWARF_DEBUG
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}
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