mirror of
https://github.com/torvalds/linux.git
synced 2024-11-16 09:02:00 +00:00
daf8741675
As our SMP implementation uses MESI protocols. Grouping together data which is mostly only read together means that we avoid unnecessary cache line bouncing when this code shares a cache line with other data. In other words, cache lines associated with read-mostly data are expected to spend most of their time in shared state. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
29 lines
774 B
C
29 lines
774 B
C
/*
|
|
* arch/arm/include/asm/cache.h
|
|
*/
|
|
#ifndef __ASMARM_CACHE_H
|
|
#define __ASMARM_CACHE_H
|
|
|
|
#define L1_CACHE_SHIFT CONFIG_ARM_L1_CACHE_SHIFT
|
|
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
|
|
|
|
/*
|
|
* Memory returned by kmalloc() may be used for DMA, so we must make
|
|
* sure that all such allocations are cache aligned. Otherwise,
|
|
* unrelated code may cause parts of the buffer to be read into the
|
|
* cache before the transfer is done, causing old data to be seen by
|
|
* the CPU.
|
|
*/
|
|
#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
|
|
|
|
/*
|
|
* With EABI on ARMv5 and above we must have 64-bit aligned slab pointers.
|
|
*/
|
|
#if defined(CONFIG_AEABI) && (__LINUX_ARM_ARCH__ >= 5)
|
|
#define ARCH_SLAB_MINALIGN 8
|
|
#endif
|
|
|
|
#define __read_mostly __attribute__((__section__(".data..read_mostly")))
|
|
|
|
#endif
|