Shannon Zhao 051ff581ce arm64: KVM: Add access handler for event counter register ... These kind of registers include PMEVCNTRn, PMCCNTR and PMXEVCNTR which is mapped to PMEVCNTRn. The access handler translates all aarch32 register offsets to aarch64 ones and uses vcpu_sys_reg() to access their values to avoid taking care of big endian. When reading these registers, return the sum of register value and the value perf event counts. Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Reviewed-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>		2016-02-29 18:34:20 +00:00
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hyp	arm64: KVM: Move vgic-v2 and timer save/restore to virt/kvm/arm/hyp	2016-02-29 18:34:18 +00:00
arch_timer.c	KVM: arm/arm64: Fix reference to uninitialised VGIC	2016-02-08 15:23:39 +00:00
pmu.c	arm64: KVM: Add access handler for event counter register	2016-02-29 18:34:20 +00:00
trace.h	arm/arm64: KVM: Add tracepoints for vgic and timer	2015-10-22 23:01:48 +02:00
vgic-v2-emul.c	KVM: arm/arm64: rework MMIO abort handling to use KVM MMIO bus	2015-03-30 17:07:19 +01:00
vgic-v2.c	KVM: arm/arm64: Merge vgic_set_lr() and vgic_sync_lr_elrsr()	2015-11-04 15:29:49 +01:00
vgic-v3-emul.c	KVM: arm: vgic: Drop useless Group0 warning	2015-06-17 09:58:12 +01:00
vgic-v3.c	arm64: KVM: Turn system register numbers to an enum	2015-12-14 11:30:43 +00:00
vgic.c	KVM: arm/arm64: vgic: Ensure bitmaps are long enough	2016-02-23 19:02:48 +00:00
vgic.h	KVM: arm/arm64: rework MMIO abort handling to use KVM MMIO bus	2015-03-30 17:07:19 +01:00