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021230d40a
This code abstracts the per-queue MSI-X interrupt vector into a queue vector layer. This abstraction is needed since there can be many more queues than available MSI-X vectors in a machine. The MSI-X irq vectors are remapped to a shared queue vector which can point to several (both RX and TX) hardware queues. The NAPI algorithm then cleans the appropriate ring/queues on interrupt or poll. The remapping is a delicate and complex calculation to make sure that we're not unbalancing the irq load, and spreads the irqs as much as possible, and may combine RX and TX flows onto the same queue vector. This effectively enables receive flow hashing across vectors and helps irq load balance across CPUs. Signed-off-by: Ayyappan Veeraiyan <ayyappan.veeraiyan@intel.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Acked-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Acked-by: Waskiewicz Jr, Peter P <peter.p.waskiewicz.jr@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org> |
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| .. | ||
| ixgbe_82598.c | ||
| ixgbe_common.c | ||
| ixgbe_common.h | ||
| ixgbe_ethtool.c | ||
| ixgbe_main.c | ||
| ixgbe_phy.c | ||
| ixgbe_phy.h | ||
| ixgbe_type.h | ||
| ixgbe.h | ||
| Makefile | ||