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1d78814d41
Currently each ordering variant has several potential definitions,
with a mixture of preprocessor and C definitions, including several
copies of its C prototype, e.g.
| #if defined(arch_atomic_fetch_andnot_acquire)
| #define raw_atomic_fetch_andnot_acquire arch_atomic_fetch_andnot_acquire
| #elif defined(arch_atomic_fetch_andnot_relaxed)
| static __always_inline int
| raw_atomic_fetch_andnot_acquire(int i, atomic_t *v)
| {
| int ret = arch_atomic_fetch_andnot_relaxed(i, v);
| __atomic_acquire_fence();
| return ret;
| }
| #elif defined(arch_atomic_fetch_andnot)
| #define raw_atomic_fetch_andnot_acquire arch_atomic_fetch_andnot
| #else
| static __always_inline int
| raw_atomic_fetch_andnot_acquire(int i, atomic_t *v)
| {
| return raw_atomic_fetch_and_acquire(~i, v);
| }
| #endif
Make this a bit simpler by defining the C prototype once, and writing
the various potential definitions as plain C code guarded by ifdeffery.
For example, the above becomes:
| static __always_inline int
| raw_atomic_fetch_andnot_acquire(int i, atomic_t *v)
| {
| #if defined(arch_atomic_fetch_andnot_acquire)
| return arch_atomic_fetch_andnot_acquire(i, v);
| #elif defined(arch_atomic_fetch_andnot_relaxed)
| int ret = arch_atomic_fetch_andnot_relaxed(i, v);
| __atomic_acquire_fence();
| return ret;
| #elif defined(arch_atomic_fetch_andnot)
| return arch_atomic_fetch_andnot(i, v);
| #else
| return raw_atomic_fetch_and_acquire(~i, v);
| #endif
| }
Which is far easier to read. As we now always have a single copy of the
C prototype wrapping all the potential definitions, we now have an
obvious single location for kerneldoc comments.
At the same time, the fallbacks for raw_atomic*_xhcg() are made to use
'new' rather than 'i' as the name of the new value. This is what the
existing fallback template used, and is more consistent with the
raw_atomic{_try,}cmpxchg() fallbacks.
There should be no functional change as a result of this patch.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Kees Cook <keescook@chromium.org>
Link: https://lore.kernel.org/r/20230605070124.3741859-24-mark.rutland@arm.com
42 lines
1.1 KiB
Plaintext
42 lines
1.1 KiB
Plaintext
# name meta args...
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#
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# Where meta contains a string of variants to generate.
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# Upper-case implies _{acquire,release,relaxed} variants.
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# Valid meta values are:
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# * B/b - bool: returns bool
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# * v - void: returns void
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# * I/i - int: returns base type
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# * R - return: returns base type (has _return variants)
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# * F/f - fetch: returns base type (has fetch_ variants)
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# * l - load: returns base type (has _acquire order variant)
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# * s - store: returns void (has _release order variant)
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#
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# Where args contains list of type[:name], where type is:
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# * cv - const pointer to atomic base type (atomic_t/atomic64_t/atomic_long_t)
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# * v - pointer to atomic base type (atomic_t/atomic64_t/atomic_long_t)
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# * i - base type (int/s64/long)
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# * p - pointer to base type (int/s64/long)
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#
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read l cv
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set s v i
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add vRF i v
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sub vRF i v
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inc vRF v
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dec vRF v
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and vF i v
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andnot vF i v
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or vF i v
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xor vF i v
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xchg I v i:new
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cmpxchg I v i:old i:new
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try_cmpxchg B v p:old i:new
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sub_and_test b i v
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dec_and_test b v
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inc_and_test b v
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add_negative B i v
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add_unless fb v i:a i:u
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inc_not_zero b v
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inc_unless_negative b v
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dec_unless_positive b v
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dec_if_positive i v
|