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PCI and platform buses have different defaults for runtime PM. In particular PCI probe is assumed to be called when PM runtime is enabled by the PCI core. In this case if we try enable it again the PM runtime complaints with pxa2xx_spi_pci 0000:00:07.0: Unbalanced pm_runtime_enable! Fix this by moving PM runtime handling from the SPI PXA2xx core to the glue drivers. Fixes:cc160697a5
("spi: pxa2xx: Convert PCI driver to use spi-pxa2xx code directly") Fixes:3d8f037fbc
("spi: pxa2xx: Move platform driver to a separate file") Fixes:20ade9b977
("spi: pxa2xx: Extract pxa2xx_spi_platform_*() callbacks") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://patch.msgid.link/20240822113408.750831-3-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
353 lines
9.0 KiB
C
353 lines
9.0 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* PCI glue driver for SPI PXA2xx compatible controllers.
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* CE4100's SPI device is more or less the same one as found on PXA.
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*
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* Copyright (C) 2016, 2021 Intel Corporation
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*/
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#include <linux/clk-provider.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/pm.h>
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#include <linux/pm_runtime.h>
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#include <linux/sprintf.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include <linux/dmaengine.h>
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#include <linux/platform_data/dma-dw.h>
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#include "spi-pxa2xx.h"
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#define PCI_DEVICE_ID_INTEL_QUARK_X1000 0x0935
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#define PCI_DEVICE_ID_INTEL_BYT 0x0f0e
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#define PCI_DEVICE_ID_INTEL_MRFLD 0x1194
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#define PCI_DEVICE_ID_INTEL_BSW0 0x228e
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#define PCI_DEVICE_ID_INTEL_BSW1 0x2290
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#define PCI_DEVICE_ID_INTEL_BSW2 0x22ac
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#define PCI_DEVICE_ID_INTEL_CE4100 0x2e6a
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#define PCI_DEVICE_ID_INTEL_LPT0_0 0x9c65
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#define PCI_DEVICE_ID_INTEL_LPT0_1 0x9c66
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#define PCI_DEVICE_ID_INTEL_LPT1_0 0x9ce5
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#define PCI_DEVICE_ID_INTEL_LPT1_1 0x9ce6
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struct pxa_spi_info {
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int (*setup)(struct pci_dev *pdev, struct pxa2xx_spi_controller *c);
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};
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static struct dw_dma_slave byt_tx_param = { .dst_id = 0 };
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static struct dw_dma_slave byt_rx_param = { .src_id = 1 };
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static struct dw_dma_slave mrfld3_tx_param = { .dst_id = 15 };
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static struct dw_dma_slave mrfld3_rx_param = { .src_id = 14 };
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static struct dw_dma_slave mrfld5_tx_param = { .dst_id = 13 };
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static struct dw_dma_slave mrfld5_rx_param = { .src_id = 12 };
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static struct dw_dma_slave mrfld6_tx_param = { .dst_id = 11 };
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static struct dw_dma_slave mrfld6_rx_param = { .src_id = 10 };
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static struct dw_dma_slave bsw0_tx_param = { .dst_id = 0 };
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static struct dw_dma_slave bsw0_rx_param = { .src_id = 1 };
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static struct dw_dma_slave bsw1_tx_param = { .dst_id = 6 };
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static struct dw_dma_slave bsw1_rx_param = { .src_id = 7 };
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static struct dw_dma_slave bsw2_tx_param = { .dst_id = 8 };
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static struct dw_dma_slave bsw2_rx_param = { .src_id = 9 };
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static struct dw_dma_slave lpt1_tx_param = { .dst_id = 0 };
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static struct dw_dma_slave lpt1_rx_param = { .src_id = 1 };
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static struct dw_dma_slave lpt0_tx_param = { .dst_id = 2 };
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static struct dw_dma_slave lpt0_rx_param = { .src_id = 3 };
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static void pxa2xx_spi_pci_clk_unregister(void *clk)
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{
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clk_unregister(clk);
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}
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static int pxa2xx_spi_pci_clk_register(struct pci_dev *dev, struct ssp_device *ssp,
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unsigned long rate)
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{
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char buf[40];
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snprintf(buf, sizeof(buf), "pxa2xx-spi.%d", ssp->port_id);
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ssp->clk = clk_register_fixed_rate(&dev->dev, buf, NULL, 0, rate);
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if (IS_ERR(ssp->clk))
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return PTR_ERR(ssp->clk);
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return devm_add_action_or_reset(&dev->dev, pxa2xx_spi_pci_clk_unregister, ssp->clk);
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}
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static bool lpss_dma_filter(struct dma_chan *chan, void *param)
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{
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struct dw_dma_slave *dws = param;
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if (dws->dma_dev != chan->device->dev)
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return false;
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chan->private = dws;
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return true;
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}
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static void lpss_dma_put_device(void *dma_dev)
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{
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pci_dev_put(dma_dev);
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}
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static int lpss_spi_setup(struct pci_dev *dev, struct pxa2xx_spi_controller *c)
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{
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struct ssp_device *ssp = &c->ssp;
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struct dw_dma_slave *tx, *rx;
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struct pci_dev *dma_dev;
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int ret;
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switch (dev->device) {
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case PCI_DEVICE_ID_INTEL_BYT:
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ssp->type = LPSS_BYT_SSP;
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ssp->port_id = 0;
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c->tx_param = &byt_tx_param;
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c->rx_param = &byt_rx_param;
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break;
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case PCI_DEVICE_ID_INTEL_BSW0:
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ssp->type = LPSS_BSW_SSP;
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ssp->port_id = 0;
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c->tx_param = &bsw0_tx_param;
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c->rx_param = &bsw0_rx_param;
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break;
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case PCI_DEVICE_ID_INTEL_BSW1:
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ssp->type = LPSS_BSW_SSP;
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ssp->port_id = 1;
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c->tx_param = &bsw1_tx_param;
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c->rx_param = &bsw1_rx_param;
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break;
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case PCI_DEVICE_ID_INTEL_BSW2:
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ssp->type = LPSS_BSW_SSP;
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ssp->port_id = 2;
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c->tx_param = &bsw2_tx_param;
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c->rx_param = &bsw2_rx_param;
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break;
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case PCI_DEVICE_ID_INTEL_LPT0_0:
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case PCI_DEVICE_ID_INTEL_LPT1_0:
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ssp->type = LPSS_LPT_SSP;
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ssp->port_id = 0;
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c->tx_param = &lpt0_tx_param;
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c->rx_param = &lpt0_rx_param;
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break;
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case PCI_DEVICE_ID_INTEL_LPT0_1:
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case PCI_DEVICE_ID_INTEL_LPT1_1:
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ssp->type = LPSS_LPT_SSP;
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ssp->port_id = 1;
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c->tx_param = &lpt1_tx_param;
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c->rx_param = &lpt1_rx_param;
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break;
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default:
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return -ENODEV;
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}
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c->num_chipselect = 1;
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ret = pxa2xx_spi_pci_clk_register(dev, ssp, 50000000);
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if (ret)
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return ret;
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dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
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ret = devm_add_action_or_reset(&dev->dev, lpss_dma_put_device, dma_dev);
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if (ret)
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return ret;
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tx = c->tx_param;
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tx->dma_dev = &dma_dev->dev;
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tx->m_master = 0;
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tx->p_master = 1;
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rx = c->rx_param;
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rx->dma_dev = &dma_dev->dev;
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rx->m_master = 0;
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rx->p_master = 1;
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c->dma_filter = lpss_dma_filter;
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c->dma_burst_size = 1;
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c->enable_dma = 1;
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return 0;
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}
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static const struct pxa_spi_info lpss_info_config = {
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.setup = lpss_spi_setup,
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};
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static int ce4100_spi_setup(struct pci_dev *dev, struct pxa2xx_spi_controller *c)
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{
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struct ssp_device *ssp = &c->ssp;
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ssp->type = PXA25x_SSP;
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ssp->port_id = dev->devfn;
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c->num_chipselect = dev->devfn;
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return pxa2xx_spi_pci_clk_register(dev, ssp, 3686400);
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}
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static const struct pxa_spi_info ce4100_info_config = {
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.setup = ce4100_spi_setup,
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};
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static int mrfld_spi_setup(struct pci_dev *dev, struct pxa2xx_spi_controller *c)
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{
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struct ssp_device *ssp = &c->ssp;
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struct dw_dma_slave *tx, *rx;
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struct pci_dev *dma_dev;
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int ret;
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ssp->type = MRFLD_SSP;
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switch (PCI_FUNC(dev->devfn)) {
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case 0:
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ssp->port_id = 3;
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c->num_chipselect = 1;
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c->tx_param = &mrfld3_tx_param;
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c->rx_param = &mrfld3_rx_param;
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break;
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case 1:
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ssp->port_id = 5;
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c->num_chipselect = 4;
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c->tx_param = &mrfld5_tx_param;
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c->rx_param = &mrfld5_rx_param;
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break;
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case 2:
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ssp->port_id = 6;
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c->num_chipselect = 1;
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c->tx_param = &mrfld6_tx_param;
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c->rx_param = &mrfld6_rx_param;
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break;
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default:
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return -ENODEV;
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}
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ret = pxa2xx_spi_pci_clk_register(dev, ssp, 25000000);
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if (ret)
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return ret;
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dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(21, 0));
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ret = devm_add_action_or_reset(&dev->dev, lpss_dma_put_device, dma_dev);
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if (ret)
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return ret;
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tx = c->tx_param;
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tx->dma_dev = &dma_dev->dev;
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rx = c->rx_param;
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rx->dma_dev = &dma_dev->dev;
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c->dma_filter = lpss_dma_filter;
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c->dma_burst_size = 8;
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c->enable_dma = 1;
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return 0;
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}
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static const struct pxa_spi_info mrfld_info_config = {
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.setup = mrfld_spi_setup,
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};
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static int qrk_spi_setup(struct pci_dev *dev, struct pxa2xx_spi_controller *c)
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{
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struct ssp_device *ssp = &c->ssp;
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ssp->type = QUARK_X1000_SSP;
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ssp->port_id = dev->devfn;
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c->num_chipselect = 1;
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return pxa2xx_spi_pci_clk_register(dev, ssp, 50000000);
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}
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static const struct pxa_spi_info qrk_info_config = {
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.setup = qrk_spi_setup,
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};
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static int pxa2xx_spi_pci_probe(struct pci_dev *dev,
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const struct pci_device_id *ent)
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{
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const struct pxa_spi_info *info;
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int ret;
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struct pxa2xx_spi_controller *pdata;
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struct ssp_device *ssp;
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ret = pcim_enable_device(dev);
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if (ret)
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return ret;
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ret = pcim_iomap_regions(dev, 1 << 0, "PXA2xx SPI");
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if (ret)
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return ret;
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pdata = devm_kzalloc(&dev->dev, sizeof(*pdata), GFP_KERNEL);
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if (!pdata)
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return -ENOMEM;
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ssp = &pdata->ssp;
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ssp->dev = &dev->dev;
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ssp->phys_base = pci_resource_start(dev, 0);
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ssp->mmio_base = pcim_iomap_table(dev)[0];
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info = (struct pxa_spi_info *)ent->driver_data;
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ret = info->setup(dev, pdata);
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if (ret)
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return ret;
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pci_set_master(dev);
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ret = pci_alloc_irq_vectors(dev, 1, 1, PCI_IRQ_ALL_TYPES);
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if (ret < 0)
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return ret;
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ssp->irq = pci_irq_vector(dev, 0);
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ret = pxa2xx_spi_probe(&dev->dev, ssp, pdata);
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if (ret)
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return ret;
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pm_runtime_set_autosuspend_delay(&dev->dev, 50);
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pm_runtime_use_autosuspend(&dev->dev);
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pm_runtime_put_autosuspend(&dev->dev);
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pm_runtime_allow(&dev->dev);
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return 0;
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}
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static void pxa2xx_spi_pci_remove(struct pci_dev *dev)
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{
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pm_runtime_forbid(&dev->dev);
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pm_runtime_get_noresume(&dev->dev);
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pxa2xx_spi_remove(&dev->dev);
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}
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static const struct pci_device_id pxa2xx_spi_pci_devices[] = {
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{ PCI_DEVICE_DATA(INTEL, QUARK_X1000, &qrk_info_config) },
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{ PCI_DEVICE_DATA(INTEL, BYT, &lpss_info_config) },
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{ PCI_DEVICE_DATA(INTEL, MRFLD, &mrfld_info_config) },
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{ PCI_DEVICE_DATA(INTEL, BSW0, &lpss_info_config) },
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{ PCI_DEVICE_DATA(INTEL, BSW1, &lpss_info_config) },
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{ PCI_DEVICE_DATA(INTEL, BSW2, &lpss_info_config) },
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{ PCI_DEVICE_DATA(INTEL, CE4100, &ce4100_info_config) },
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{ PCI_DEVICE_DATA(INTEL, LPT0_0, &lpss_info_config) },
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{ PCI_DEVICE_DATA(INTEL, LPT0_1, &lpss_info_config) },
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{ PCI_DEVICE_DATA(INTEL, LPT1_0, &lpss_info_config) },
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{ PCI_DEVICE_DATA(INTEL, LPT1_1, &lpss_info_config) },
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{ }
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};
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MODULE_DEVICE_TABLE(pci, pxa2xx_spi_pci_devices);
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static struct pci_driver pxa2xx_spi_pci_driver = {
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.name = "pxa2xx_spi_pci",
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.id_table = pxa2xx_spi_pci_devices,
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.driver = {
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.pm = pm_ptr(&pxa2xx_spi_pm_ops),
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},
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.probe = pxa2xx_spi_pci_probe,
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.remove = pxa2xx_spi_pci_remove,
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};
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module_pci_driver(pxa2xx_spi_pci_driver);
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MODULE_DESCRIPTION("CE4100/LPSS PCI-SPI glue code for PXA's driver");
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MODULE_LICENSE("GPL v2");
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MODULE_IMPORT_NS(SPI_PXA2xx);
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MODULE_AUTHOR("Sebastian Andrzej Siewior <bigeasy@linutronix.de>");
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