linux/drivers/pci/devres.c
Linus Torvalds 3a37872316 pci-v6.12-changes
-----BEGIN PGP SIGNATURE-----
 
 iQJIBAABCgAyFiEEgMe7l+5h9hnxdsnuWYigwDrT+vwFAmbseugUHGJoZWxnYWFz
 QGdvb2dsZS5jb20ACgkQWYigwDrT+vxdwxAAvdvDyTuiPo2R8pQtvKg4YL2IUnK5
 UR28mBxZDK5DFhLtD/QzmVVG/eaLY6bJHthHgJgTApzekkqU0h9dcRI0eegXrvcz
 I3HRsZK2yatUky9l8O148OLzF897r7vXL3QtGe6qjKU+9D83IEeooLKgBca+GoBC
 bRLvG/fYRzdjOe8UHFqCoeMIg3IOY7CNifvFOihAGpJpxfZQktj6hSKu6q7BL1Rx
 NRgYlxh0eLcb7vAJqz6RZpQ8PRCwhAjlDuu0BOkES8/6EwisD1xUh3qdDxfVgNA6
 FpcAb/53yr46cs4tM9ZTwluka86AskuXj3jwSKf7nE3zqr4nM9OD3sGOSYzK8UdE
 EDBKj+9iEpYRC6rJMk5gNH2AZkR1OEpNUisR6+kEn81A9yNNoTmkHdHUOWo8TuxD
 btc0sTM+eWApvTiZwgL4VjMZulQllV51K8tcfvODRhlMkbOPNWGWdmpWqEbUS2HU
 i7+zzQC3DC5iPlAKgRSeYB0aad6la6brqPW16sGhGovNhgwbzakDLCUJJGn/LNuO
 wd0UNpJTnHlfChbvNh2bBxiMOo0cab1tJ5Jp97STQYhLg2nW93s/dAfdpSAsYO4S
 5YzjSADWeyeuDsHE1RdUdDvYAPMb1VZBUd2OSHis5zw7kmh25c9KYXEkDJ25q/ju
 sVXK4oMNW/Gnd5M=
 =L3s9
 -----END PGP SIGNATURE-----

Merge tag 'pci-v6.12-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci

Pull pci updates from Bjorn Helgaas:
 "Enumeration:

   - Wait for device readiness after reset by polling Vendor ID and
     looking for Configuration RRS instead of polling the Command
     register and looking for non-error completions, to avoid hardware
     retries done for RRS on non-Vendor ID reads (Bjorn Helgaas)

   - Rename CRS Completion Status to RRS ('Request Retry Status') to
     match PCIe r6.0 spec usage (Bjorn Helgaas)

   - Clear LBMS bit after a manual link retrain so we don't try to
     retrain a link when there's no downstream device anymore (Maciej W.
     Rozycki)

   - Revert to the original link speed after retraining fails instead of
     leaving it restricted to 2.5GT/s, so a future device has a chance
     to use higher speeds (Maciej W. Rozycki)

   - Wait for each level of downstream bus, not just the first, to
     become accessible before restoring devices on that bus (Ilpo
     Järvinen)

   - Add ARCH_PCI_DEV_GROUPS so s390 can add its own attribute_groups
     without having to stomp on the core's pdev->dev.groups (Lukas
     Wunner)

  Driver binding:

   - Export pcim_request_region(), a managed counterpart of
     pci_request_region(), for use by drivers (Philipp Stanner)

   - Export pcim_iomap_region() and deprecate pcim_iomap_regions()
     (Philipp Stanner)

   - Request the PCI BAR used by xboxvideo (Philipp Stanner)

   - Request and map drm/ast BARs with pcim_iomap_region() (Philipp
     Stanner)

  MSI:

   - Add MSI_FLAG_NO_AFFINITY flag for devices that mux MSIs onto a
     single IRQ line and cannot set the affinity of each MSI to a
     specific CPU core (Marek Vasut)

   - Use MSI_FLAG_NO_AFFINITY and remove unnecessary .irq_set_affinity()
     implementations in aardvark, altera, brcmstb, dwc, mediatek-gen3,
     mediatek, mobiveil, plda, rcar, tegra, vmd, xilinx-nwl,
     xilinx-xdma, and xilinx drivers to avoid 'IRQ: set affinity failed'
     warnings (Marek Vasut)

  Power management:

   - Add pwrctl support for ATH11K inside the WCN6855 package (Konrad
     Dybcio)

  PCI device hotplug:

   - Remove unnecessary hpc_ops struct from shpchp (ngn)

   - Check for PCI_POSSIBLE_ERROR(), not 0xffffffff, in cpqphp
     (weiyufeng)

  Virtualization:

   - Mark Creative Labs EMU20k2 INTx masking as broken (Alex Williamson)

   - Add an ACS quirk for Qualcomm SA8775P, which doesn't advertise ACS
     but does provide ACS-like features (Subramanian Ananthanarayanan)

  IOMMU:

   - Add function 0 DMA alias quirk for Glenfly Arise audio function,
     which uses the function 0 Requester ID (WangYuli)

  NPEM:

   - Add Native PCIe Enclosure Management (NPEM) support for sysfs
     control of NVMe RAID storage indicators (ok/fail/locate/
     rebuild/etc) (Mariusz Tkaczyk)

   - Add support for the ACPI _DSM PCIe SSD status LED management, which
     is functionally similar to NPEM but mediated by platform firmware
     (Mariusz Tkaczyk)

  Device trees:

   - Drop minItems and maxItems from ranges in PCI generic host binding
     since host bridges may have several MMIO and I/O port apertures
     (Frank Li)

   - Add kirin, rcar-gen2, uniphier DT binding top-level constraints for
     clocks (Krzysztof Kozlowski)

  Altera PCIe controller driver:

   - Convert altera DT bindings from text to YAML (Matthew Gerlach)

   - Replace TLP_REQ_ID() with macro PCI_DEVID(), which does the same
     thing and is what other drivers use (Jinjie Ruan)

  Broadcom STB PCIe controller driver:

   - Add DT binding maxItems for reset controllers (Jim Quinlan)

   - Use the 'bridge' reset method if described in the DT (Jim Quinlan)

   - Use the 'swinit' reset method if described in the DT (Jim Quinlan)

   - Add 'has_phy' so the existence of a 'rescal' reset controller
     doesn't imply software control of it (Jim Quinlan)

   - Add support for many inbound DMA windows (Jim Quinlan)

   - Rename SoC 'type' to 'soc_base' express the fact that SoCs come in
     families of multiple similar devices (Jim Quinlan)

   - Add Broadcom 7712 DT description and driver support (Jim Quinlan)

   - Sort enums, pcie_offsets[], pcie_cfg_data, .compatible strings for
     maintainability (Bjorn Helgaas)

  Freescale i.MX6 PCIe controller driver:

   - Add imx6q-pcie 'dbi2' and 'atu' reg-names for i.MX8M Endpoints
     (Richard Zhu)

   - Fix a code restructuring error that caused i.MX8MM and i.MX8MP
     Endpoints to fail to establish link (Richard Zhu)

   - Fix i.MX8MP Endpoint occasional failure to trigger MSI by enforcing
     outbound alignment requirement (Richard Zhu)

   - Call phy_power_off() in the .probe() error path (Frank Li)

   - Rename internal names from imx6_* to imx_* since i.MX7/8/9 are also
     supported (Frank Li)

   - Manage Refclk by using SoC-specific callbacks instead of switch
     statements (Frank Li)

   - Manage core reset by using SoC-specific callbacks instead of switch
     statements (Frank Li)

   - Expand comments for erratum ERR010728 workaround (Frank Li)

   - Use generic PHY APIs to configure mode, speed, and submode, which
     is harmless for devices that implement their own internal PHY
     management and don't set the generic imx_pcie->phy (Frank Li)

   - Add i.MX8Q (i.MX8QM, i.MX8QXP, and i.MX8DXL) DT binding and driver
     Root Complex support (Richard Zhu)

  Freescale Layerscape PCIe controller driver:

   - Replace layerscape-pcie DT binding compatible fsl,lx2160a-pcie with
     fsl,lx2160ar2-pcie (Frank Li)

   - Add layerscape-pcie DT binding deprecated 'num-viewport' property
     to address a DT checker warning (Frank Li)

   - Change layerscape-pcie DT binding 'fsl,pcie-scfg' to phandle-array
     (Frank Li)

  Loongson PCIe controller driver:

   - Increase max PCI hosts to 8 for Loongson-3C6000 and newer chipsets
     (Huacai Chen)

  Marvell Aardvark PCIe controller driver:

   - Fix issue with emulating Configuration RRS for two-byte reads of
     Vendor ID; previously it only worked for four-byte reads (Bjorn
     Helgaas)

  MediaTek PCIe Gen3 controller driver:

   - Add per-SoC struct mtk_gen3_pcie_pdata to support multiple SoC
     types (Lorenzo Bianconi)

   - Use reset_bulk APIs to manage PHY reset lines (Lorenzo Bianconi)

   - Add DT and driver support for Airoha EN7581 PCIe controller
     (Lorenzo Bianconi)

  Qualcomm PCIe controller driver:

   - Update qcom,pcie-sc7280 DT binding with eight interrupts (Rayyan
     Ansari)

   - Add back DT 'vddpe-3v3-supply', which was incorrectly removed
     earlier (Johan Hovold)

   - Drop endpoint redundant masking of global IRQ events (Manivannan
     Sadhasivam)

   - Clarify unknown global IRQ message and only log it once to avoid a
     flood (Manivannan Sadhasivam)

   - Add 'linux,pci-domain' property to endpoint DT binding (Manivannan
     Sadhasivam)

   - Assign PCI domain number for endpoint controllers (Manivannan
     Sadhasivam)

   - Add 'qcom_pcie_ep' and the PCI domain number to IRQ names for
     endpoint controller (Manivannan Sadhasivam)

   - Add global SPI interrupt for PCIe link events to DT binding
     (Manivannan Sadhasivam)

   - Add global RC interrupt handler to handle 'Link up' events and
     automatically enumerate hot-added devices (Manivannan Sadhasivam)

   - Avoid mirroring of DBI and iATU register space so it doesn't
     overlap BAR MMIO space (Prudhvi Yarlagadda)

   - Enable controller resources like PHY only after PERST# is
     deasserted to partially avoid the problem that the endpoint SoC
     crashes when accessing things when Refclk is absent (Manivannan
     Sadhasivam)

   - Add 16.0 GT/s equalization and RX lane margining settings (Shashank
     Babu Chinta Venkata)

   - Pass domain number to pci_bus_release_domain_nr() explicitly to
     avoid a NULL pointer dereference (Manivannan Sadhasivam)

  Renesas R-Car PCIe controller driver:

   - Make the read-only const array 'check_addr' static (Colin Ian King)

   - Add R-Car V4M (R8A779H0) PCIe host and endpoint to DT binding
     (Yoshihiro Shimoda)

  TI DRA7xx PCIe controller driver:

   - Request IRQF_ONESHOT for 'dra7xx-pcie-main' IRQ since the primary
     handler is NULL (Siddharth Vadapalli)

   - Handle IRQ request errors during root port and endpoint probe
     (Siddharth Vadapalli)

  TI J721E PCIe driver:

   - Add DT 'ti,syscon-acspcie-proxy-ctrl' and driver support to enable
     the ACSPCIE module to drive Refclk for the Endpoint (Siddharth
     Vadapalli)

   - Extract the cadence link setup from cdns_pcie_host_setup() so link
     setup can be done separately during resume (Thomas Richard)

   - Add T_PERST_CLK_US definition for the mandatory delay between
     Refclk becoming stable and PERST# being deasserted (Thomas Richard)

   - Add j721e suspend and resume support (Théo Lebrun)

  TI Keystone PCIe controller driver:

   - Fix NULL pointer checking when applying MRRS limitation quirk for
     AM65x SR 1.0 Errata #i2037 (Dan Carpenter)

  Xilinx NWL PCIe controller driver:

   - Fix off-by-one error in INTx IRQ handler that caused INTx
     interrupts to be lost or delivered as the wrong interrupt (Sean
     Anderson)

   - Rate-limit misc interrupt messages (Sean Anderson)

   - Turn off the clock on probe failure and device removal (Sean
     Anderson)

   - Add DT binding and driver support for enabling/disabling PHYs (Sean
     Anderson)

   - Add PCIe phy bindings for the ZCU102 (Sean Anderson)

  Xilinx XDMA PCIe controller driver:

   - Add support for Xilinx QDMA Soft IP PCIe Root Port Bridge to DT
     binding and xilinx-dma-pl driver (Thippeswamy Havalige)

  Miscellaneous:

   - Fix buffer overflow in kirin_pcie_parse_port() (Alexandra Diupina)

   - Fix minor kerneldoc issues and typos (Bjorn Helgaas)

   - Use PCI_DEVID() macro in aer_inject() instead of open-coding it
     (Jinjie Ruan)

   - Check pcie_find_root_port() return in x86 fixups to avoid NULL
     pointer dereferences (Samasth Norway Ananda)

   - Make pci_bus_type constant (Kunwu Chan)

   - Remove unused declarations of __pci_pme_wakeup() and
     pci_vpd_release() (Yue Haibing)

   - Remove any leftover .*.cmd files with make clean (zhang jiao)

   - Remove unused BILLION macro (zhang jiao)"

* tag 'pci-v6.12-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci: (132 commits)
  PCI: Fix typos
  dt-bindings: PCI: qcom: Allow 'vddpe-3v3-supply' again
  tools: PCI: Remove unused BILLION macro
  tools: PCI: Remove .*.cmd files with make clean
  PCI: Pass domain number to pci_bus_release_domain_nr() explicitly
  PCI: dra7xx: Fix error handling when IRQ request fails in probe
  PCI: dra7xx: Fix threaded IRQ request for "dra7xx-pcie-main" IRQ
  PCI: qcom: Add RX lane margining settings for 16.0 GT/s
  PCI: qcom: Add equalization settings for 16.0 GT/s
  PCI: dwc: Always cache the maximum link speed value in dw_pcie::max_link_speed
  PCI: dwc: Rename 'dw_pcie::link_gen' to 'dw_pcie::max_link_speed'
  PCI: qcom-ep: Enable controller resources like PHY only after refclk is available
  PCI: Mark Creative Labs EMU20k2 INTx masking as broken
  dt-bindings: PCI: imx6q-pcie: Add reg-name "dbi2" and "atu" for i.MX8M PCIe Endpoint
  dt-bindings: PCI: altera: msi: Convert to YAML
  PCI: imx6: Add i.MX8Q PCIe Root Complex (RC) support
  PCI: Rename CRS Completion Status to RRS
  PCI: aardvark: Correct Configuration RRS checking
  PCI: Wait for device readiness with Configuration RRS
  PCI: brcmstb: Sort enums, pcie_offsets[], pcie_cfg_data, .compatible strings
  ...
2024-09-23 12:47:06 -07:00

1081 lines
27 KiB
C

// SPDX-License-Identifier: GPL-2.0
#include <linux/device.h>
#include <linux/pci.h>
#include "pci.h"
/*
* On the state of PCI's devres implementation:
*
* The older devres API for PCI has two significant problems:
*
* 1. It is very strongly tied to the statically allocated mapping table in
* struct pcim_iomap_devres below. This is mostly solved in the sense of the
* pcim_ functions in this file providing things like ranged mapping by
* bypassing this table, whereas the functions that were present in the old
* API still enter the mapping addresses into the table for users of the old
* API.
*
* 2. The region-request-functions in pci.c do become managed IF the device has
* been enabled with pcim_enable_device() instead of pci_enable_device().
* This resulted in the API becoming inconsistent: Some functions have an
* obviously managed counter-part (e.g., pci_iomap() <-> pcim_iomap()),
* whereas some don't and are never managed, while others don't and are
* _sometimes_ managed (e.g. pci_request_region()).
*
* Consequently, in the new API, region requests performed by the pcim_
* functions are automatically cleaned up through the devres callback
* pcim_addr_resource_release().
*
* Users of pcim_enable_device() + pci_*region*() are redirected in
* pci.c to the managed functions here in this file. This isn't exactly
* perfect, but the only alternative way would be to port ALL drivers
* using said combination to pcim_ functions.
*
* TODO:
* Remove the legacy table entirely once all calls to pcim_iomap_table() in
* the kernel have been removed.
*/
/*
* Legacy struct storing addresses to whole mapped BARs.
*/
struct pcim_iomap_devres {
void __iomem *table[PCI_STD_NUM_BARS];
};
/* Used to restore the old INTx state on driver detach. */
struct pcim_intx_devres {
int orig_intx;
};
enum pcim_addr_devres_type {
/* Default initializer. */
PCIM_ADDR_DEVRES_TYPE_INVALID,
/* A requested region spanning an entire BAR. */
PCIM_ADDR_DEVRES_TYPE_REGION,
/*
* A requested region spanning an entire BAR, and a mapping for
* the entire BAR.
*/
PCIM_ADDR_DEVRES_TYPE_REGION_MAPPING,
/*
* A mapping within a BAR, either spanning the whole BAR or just a
* range. Without a requested region.
*/
PCIM_ADDR_DEVRES_TYPE_MAPPING,
};
/*
* This struct envelops IO or MEM addresses, i.e., mappings and region
* requests, because those are very frequently requested and released
* together.
*/
struct pcim_addr_devres {
enum pcim_addr_devres_type type;
void __iomem *baseaddr;
unsigned long offset;
unsigned long len;
int bar;
};
static inline void pcim_addr_devres_clear(struct pcim_addr_devres *res)
{
memset(res, 0, sizeof(*res));
res->bar = -1;
}
/*
* The following functions, __pcim_*_region*, exist as counterparts to the
* versions from pci.c - which, unfortunately, can be in "hybrid mode", i.e.,
* sometimes managed, sometimes not.
*
* To separate the APIs cleanly, we define our own, simplified versions here.
*/
/**
* __pcim_request_region_range - Request a ranged region
* @pdev: PCI device the region belongs to
* @bar: BAR the range is within
* @offset: offset from the BAR's start address
* @maxlen: length in bytes, beginning at @offset
* @name: name associated with the request
* @req_flags: flags for the request, e.g., for kernel-exclusive requests
*
* Returns: 0 on success, a negative error code on failure.
*
* Request a range within a device's PCI BAR. Sanity check the input.
*/
static int __pcim_request_region_range(struct pci_dev *pdev, int bar,
unsigned long offset,
unsigned long maxlen,
const char *name, int req_flags)
{
resource_size_t start = pci_resource_start(pdev, bar);
resource_size_t len = pci_resource_len(pdev, bar);
unsigned long dev_flags = pci_resource_flags(pdev, bar);
if (start == 0 || len == 0) /* Unused BAR. */
return 0;
if (len <= offset)
return -EINVAL;
start += offset;
len -= offset;
if (len > maxlen && maxlen != 0)
len = maxlen;
if (dev_flags & IORESOURCE_IO) {
if (!request_region(start, len, name))
return -EBUSY;
} else if (dev_flags & IORESOURCE_MEM) {
if (!__request_mem_region(start, len, name, req_flags))
return -EBUSY;
} else {
/* That's not a device we can request anything on. */
return -ENODEV;
}
return 0;
}
static void __pcim_release_region_range(struct pci_dev *pdev, int bar,
unsigned long offset,
unsigned long maxlen)
{
resource_size_t start = pci_resource_start(pdev, bar);
resource_size_t len = pci_resource_len(pdev, bar);
unsigned long flags = pci_resource_flags(pdev, bar);
if (len <= offset || start == 0)
return;
if (len == 0 || maxlen == 0) /* This an unused BAR. Do nothing. */
return;
start += offset;
len -= offset;
if (len > maxlen)
len = maxlen;
if (flags & IORESOURCE_IO)
release_region(start, len);
else if (flags & IORESOURCE_MEM)
release_mem_region(start, len);
}
static int __pcim_request_region(struct pci_dev *pdev, int bar,
const char *name, int flags)
{
unsigned long offset = 0;
unsigned long len = pci_resource_len(pdev, bar);
return __pcim_request_region_range(pdev, bar, offset, len, name, flags);
}
static void __pcim_release_region(struct pci_dev *pdev, int bar)
{
unsigned long offset = 0;
unsigned long len = pci_resource_len(pdev, bar);
__pcim_release_region_range(pdev, bar, offset, len);
}
static void pcim_addr_resource_release(struct device *dev, void *resource_raw)
{
struct pci_dev *pdev = to_pci_dev(dev);
struct pcim_addr_devres *res = resource_raw;
switch (res->type) {
case PCIM_ADDR_DEVRES_TYPE_REGION:
__pcim_release_region(pdev, res->bar);
break;
case PCIM_ADDR_DEVRES_TYPE_REGION_MAPPING:
pci_iounmap(pdev, res->baseaddr);
__pcim_release_region(pdev, res->bar);
break;
case PCIM_ADDR_DEVRES_TYPE_MAPPING:
pci_iounmap(pdev, res->baseaddr);
break;
default:
break;
}
}
static struct pcim_addr_devres *pcim_addr_devres_alloc(struct pci_dev *pdev)
{
struct pcim_addr_devres *res;
res = devres_alloc_node(pcim_addr_resource_release, sizeof(*res),
GFP_KERNEL, dev_to_node(&pdev->dev));
if (res)
pcim_addr_devres_clear(res);
return res;
}
/* Just for consistency and readability. */
static inline void pcim_addr_devres_free(struct pcim_addr_devres *res)
{
devres_free(res);
}
/*
* Used by devres to identify a pcim_addr_devres.
*/
static int pcim_addr_resources_match(struct device *dev,
void *a_raw, void *b_raw)
{
struct pcim_addr_devres *a, *b;
a = a_raw;
b = b_raw;
if (a->type != b->type)
return 0;
switch (a->type) {
case PCIM_ADDR_DEVRES_TYPE_REGION:
case PCIM_ADDR_DEVRES_TYPE_REGION_MAPPING:
return a->bar == b->bar;
case PCIM_ADDR_DEVRES_TYPE_MAPPING:
return a->baseaddr == b->baseaddr;
default:
return 0;
}
}
static void devm_pci_unmap_iospace(struct device *dev, void *ptr)
{
struct resource **res = ptr;
pci_unmap_iospace(*res);
}
/**
* devm_pci_remap_iospace - Managed pci_remap_iospace()
* @dev: Generic device to remap IO address for
* @res: Resource describing the I/O space
* @phys_addr: physical address of range to be mapped
*
* Managed pci_remap_iospace(). Map is automatically unmapped on driver
* detach.
*/
int devm_pci_remap_iospace(struct device *dev, const struct resource *res,
phys_addr_t phys_addr)
{
const struct resource **ptr;
int error;
ptr = devres_alloc(devm_pci_unmap_iospace, sizeof(*ptr), GFP_KERNEL);
if (!ptr)
return -ENOMEM;
error = pci_remap_iospace(res, phys_addr);
if (error) {
devres_free(ptr);
} else {
*ptr = res;
devres_add(dev, ptr);
}
return error;
}
EXPORT_SYMBOL(devm_pci_remap_iospace);
/**
* devm_pci_remap_cfgspace - Managed pci_remap_cfgspace()
* @dev: Generic device to remap IO address for
* @offset: Resource address to map
* @size: Size of map
*
* Managed pci_remap_cfgspace(). Map is automatically unmapped on driver
* detach.
*/
void __iomem *devm_pci_remap_cfgspace(struct device *dev,
resource_size_t offset,
resource_size_t size)
{
void __iomem **ptr, *addr;
ptr = devres_alloc(devm_ioremap_release, sizeof(*ptr), GFP_KERNEL);
if (!ptr)
return NULL;
addr = pci_remap_cfgspace(offset, size);
if (addr) {
*ptr = addr;
devres_add(dev, ptr);
} else
devres_free(ptr);
return addr;
}
EXPORT_SYMBOL(devm_pci_remap_cfgspace);
/**
* devm_pci_remap_cfg_resource - check, request region and ioremap cfg resource
* @dev: generic device to handle the resource for
* @res: configuration space resource to be handled
*
* Checks that a resource is a valid memory region, requests the memory
* region and ioremaps with pci_remap_cfgspace() API that ensures the
* proper PCI configuration space memory attributes are guaranteed.
*
* All operations are managed and will be undone on driver detach.
*
* Returns a pointer to the remapped memory or an IOMEM_ERR_PTR() encoded error
* code on failure. Usage example::
*
* res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
* base = devm_pci_remap_cfg_resource(&pdev->dev, res);
* if (IS_ERR(base))
* return PTR_ERR(base);
*/
void __iomem *devm_pci_remap_cfg_resource(struct device *dev,
struct resource *res)
{
resource_size_t size;
const char *name;
void __iomem *dest_ptr;
BUG_ON(!dev);
if (!res || resource_type(res) != IORESOURCE_MEM) {
dev_err(dev, "invalid resource\n");
return IOMEM_ERR_PTR(-EINVAL);
}
size = resource_size(res);
if (res->name)
name = devm_kasprintf(dev, GFP_KERNEL, "%s %s", dev_name(dev),
res->name);
else
name = devm_kstrdup(dev, dev_name(dev), GFP_KERNEL);
if (!name)
return IOMEM_ERR_PTR(-ENOMEM);
if (!devm_request_mem_region(dev, res->start, size, name)) {
dev_err(dev, "can't request region for resource %pR\n", res);
return IOMEM_ERR_PTR(-EBUSY);
}
dest_ptr = devm_pci_remap_cfgspace(dev, res->start, size);
if (!dest_ptr) {
dev_err(dev, "ioremap failed for resource %pR\n", res);
devm_release_mem_region(dev, res->start, size);
dest_ptr = IOMEM_ERR_PTR(-ENOMEM);
}
return dest_ptr;
}
EXPORT_SYMBOL(devm_pci_remap_cfg_resource);
static void __pcim_clear_mwi(void *pdev_raw)
{
struct pci_dev *pdev = pdev_raw;
pci_clear_mwi(pdev);
}
/**
* pcim_set_mwi - a device-managed pci_set_mwi()
* @pdev: the PCI device for which MWI is enabled
*
* Managed pci_set_mwi().
*
* RETURNS: An appropriate -ERRNO error value on error, or zero for success.
*/
int pcim_set_mwi(struct pci_dev *pdev)
{
int ret;
ret = devm_add_action(&pdev->dev, __pcim_clear_mwi, pdev);
if (ret != 0)
return ret;
ret = pci_set_mwi(pdev);
if (ret != 0)
devm_remove_action(&pdev->dev, __pcim_clear_mwi, pdev);
return ret;
}
EXPORT_SYMBOL(pcim_set_mwi);
static inline bool mask_contains_bar(int mask, int bar)
{
return mask & BIT(bar);
}
/*
* This is a copy of pci_intx() used to bypass the problem of recursive
* function calls due to the hybrid nature of pci_intx().
*/
static void __pcim_intx(struct pci_dev *pdev, int enable)
{
u16 pci_command, new;
pci_read_config_word(pdev, PCI_COMMAND, &pci_command);
if (enable)
new = pci_command & ~PCI_COMMAND_INTX_DISABLE;
else
new = pci_command | PCI_COMMAND_INTX_DISABLE;
if (new != pci_command)
pci_write_config_word(pdev, PCI_COMMAND, new);
}
static void pcim_intx_restore(struct device *dev, void *data)
{
struct pci_dev *pdev = to_pci_dev(dev);
struct pcim_intx_devres *res = data;
__pcim_intx(pdev, res->orig_intx);
}
static struct pcim_intx_devres *get_or_create_intx_devres(struct device *dev)
{
struct pcim_intx_devres *res;
res = devres_find(dev, pcim_intx_restore, NULL, NULL);
if (res)
return res;
res = devres_alloc(pcim_intx_restore, sizeof(*res), GFP_KERNEL);
if (res)
devres_add(dev, res);
return res;
}
/**
* pcim_intx - managed pci_intx()
* @pdev: the PCI device to operate on
* @enable: boolean: whether to enable or disable PCI INTx
*
* Returns: 0 on success, -ENOMEM on error.
*
* Enable/disable PCI INTx for device @pdev.
* Restore the original state on driver detach.
*/
int pcim_intx(struct pci_dev *pdev, int enable)
{
struct pcim_intx_devres *res;
res = get_or_create_intx_devres(&pdev->dev);
if (!res)
return -ENOMEM;
res->orig_intx = !enable;
__pcim_intx(pdev, enable);
return 0;
}
static void pcim_disable_device(void *pdev_raw)
{
struct pci_dev *pdev = pdev_raw;
if (!pdev->pinned)
pci_disable_device(pdev);
pdev->is_managed = false;
}
/**
* pcim_enable_device - Managed pci_enable_device()
* @pdev: PCI device to be initialized
*
* Returns: 0 on success, negative error code on failure.
*
* Managed pci_enable_device(). Device will automatically be disabled on
* driver detach.
*/
int pcim_enable_device(struct pci_dev *pdev)
{
int ret;
ret = devm_add_action(&pdev->dev, pcim_disable_device, pdev);
if (ret != 0)
return ret;
/*
* We prefer removing the action in case of an error over
* devm_add_action_or_reset() because the latter could theoretically be
* disturbed by users having pinned the device too soon.
*/
ret = pci_enable_device(pdev);
if (ret != 0) {
devm_remove_action(&pdev->dev, pcim_disable_device, pdev);
return ret;
}
pdev->is_managed = true;
return ret;
}
EXPORT_SYMBOL(pcim_enable_device);
/**
* pcim_pin_device - Pin managed PCI device
* @pdev: PCI device to pin
*
* Pin managed PCI device @pdev. Pinned device won't be disabled on driver
* detach. @pdev must have been enabled with pcim_enable_device().
*/
void pcim_pin_device(struct pci_dev *pdev)
{
pdev->pinned = true;
}
EXPORT_SYMBOL(pcim_pin_device);
static void pcim_iomap_release(struct device *gendev, void *res)
{
/*
* Do nothing. This is legacy code.
*
* Cleanup of the mappings is now done directly through the callbacks
* registered when creating them.
*/
}
/**
* pcim_iomap_table - access iomap allocation table (DEPRECATED)
* @pdev: PCI device to access iomap table for
*
* Returns:
* Const pointer to array of __iomem pointers on success, NULL on failure.
*
* Access iomap allocation table for @dev. If iomap table doesn't
* exist and @pdev is managed, it will be allocated. All iomaps
* recorded in the iomap table are automatically unmapped on driver
* detach.
*
* This function might sleep when the table is first allocated but can
* be safely called without context and guaranteed to succeed once
* allocated.
*
* This function is DEPRECATED. Do not use it in new code. Instead, obtain a
* mapping's address directly from one of the pcim_* mapping functions. For
* example:
* void __iomem \*mappy = pcim_iomap(pdev, bar, length);
*/
void __iomem * const *pcim_iomap_table(struct pci_dev *pdev)
{
struct pcim_iomap_devres *dr, *new_dr;
dr = devres_find(&pdev->dev, pcim_iomap_release, NULL, NULL);
if (dr)
return dr->table;
new_dr = devres_alloc_node(pcim_iomap_release, sizeof(*new_dr), GFP_KERNEL,
dev_to_node(&pdev->dev));
if (!new_dr)
return NULL;
dr = devres_get(&pdev->dev, new_dr, NULL, NULL);
return dr->table;
}
EXPORT_SYMBOL(pcim_iomap_table);
/*
* Fill the legacy mapping-table, so that drivers using the old API can
* still get a BAR's mapping address through pcim_iomap_table().
*/
static int pcim_add_mapping_to_legacy_table(struct pci_dev *pdev,
void __iomem *mapping, int bar)
{
void __iomem **legacy_iomap_table;
if (bar >= PCI_STD_NUM_BARS)
return -EINVAL;
legacy_iomap_table = (void __iomem **)pcim_iomap_table(pdev);
if (!legacy_iomap_table)
return -ENOMEM;
/* The legacy mechanism doesn't allow for duplicate mappings. */
WARN_ON(legacy_iomap_table[bar]);
legacy_iomap_table[bar] = mapping;
return 0;
}
/*
* Remove a mapping. The table only contains whole-BAR mappings, so this will
* never interfere with ranged mappings.
*/
static void pcim_remove_mapping_from_legacy_table(struct pci_dev *pdev,
void __iomem *addr)
{
int bar;
void __iomem **legacy_iomap_table;
legacy_iomap_table = (void __iomem **)pcim_iomap_table(pdev);
if (!legacy_iomap_table)
return;
for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
if (legacy_iomap_table[bar] == addr) {
legacy_iomap_table[bar] = NULL;
return;
}
}
}
/*
* The same as pcim_remove_mapping_from_legacy_table(), but identifies the
* mapping by its BAR index.
*/
static void pcim_remove_bar_from_legacy_table(struct pci_dev *pdev, int bar)
{
void __iomem **legacy_iomap_table;
if (bar >= PCI_STD_NUM_BARS)
return;
legacy_iomap_table = (void __iomem **)pcim_iomap_table(pdev);
if (!legacy_iomap_table)
return;
legacy_iomap_table[bar] = NULL;
}
/**
* pcim_iomap - Managed pcim_iomap()
* @pdev: PCI device to iomap for
* @bar: BAR to iomap
* @maxlen: Maximum length of iomap
*
* Returns: __iomem pointer on success, NULL on failure.
*
* Managed pci_iomap(). Map is automatically unmapped on driver detach. If
* desired, unmap manually only with pcim_iounmap().
*
* This SHOULD only be used once per BAR.
*
* NOTE:
* Contrary to the other pcim_* functions, this function does not return an
* IOMEM_ERR_PTR() on failure, but a simple NULL. This is done for backwards
* compatibility.
*/
void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen)
{
void __iomem *mapping;
struct pcim_addr_devres *res;
res = pcim_addr_devres_alloc(pdev);
if (!res)
return NULL;
res->type = PCIM_ADDR_DEVRES_TYPE_MAPPING;
mapping = pci_iomap(pdev, bar, maxlen);
if (!mapping)
goto err_iomap;
res->baseaddr = mapping;
if (pcim_add_mapping_to_legacy_table(pdev, mapping, bar) != 0)
goto err_table;
devres_add(&pdev->dev, res);
return mapping;
err_table:
pci_iounmap(pdev, mapping);
err_iomap:
pcim_addr_devres_free(res);
return NULL;
}
EXPORT_SYMBOL(pcim_iomap);
/**
* pcim_iounmap - Managed pci_iounmap()
* @pdev: PCI device to iounmap for
* @addr: Address to unmap
*
* Managed pci_iounmap(). @addr must have been mapped using a pcim_* mapping
* function.
*/
void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr)
{
struct pcim_addr_devres res_searched;
pcim_addr_devres_clear(&res_searched);
res_searched.type = PCIM_ADDR_DEVRES_TYPE_MAPPING;
res_searched.baseaddr = addr;
if (devres_release(&pdev->dev, pcim_addr_resource_release,
pcim_addr_resources_match, &res_searched) != 0) {
/* Doesn't exist. User passed nonsense. */
return;
}
pcim_remove_mapping_from_legacy_table(pdev, addr);
}
EXPORT_SYMBOL(pcim_iounmap);
/**
* pcim_iomap_region - Request and iomap a PCI BAR
* @pdev: PCI device to map IO resources for
* @bar: Index of a BAR to map
* @name: Name associated with the request
*
* Returns: __iomem pointer on success, an IOMEM_ERR_PTR on failure.
*
* Mapping and region will get automatically released on driver detach. If
* desired, release manually only with pcim_iounmap_region().
*/
void __iomem *pcim_iomap_region(struct pci_dev *pdev, int bar,
const char *name)
{
int ret;
struct pcim_addr_devres *res;
res = pcim_addr_devres_alloc(pdev);
if (!res)
return IOMEM_ERR_PTR(-ENOMEM);
res->type = PCIM_ADDR_DEVRES_TYPE_REGION_MAPPING;
res->bar = bar;
ret = __pcim_request_region(pdev, bar, name, 0);
if (ret != 0)
goto err_region;
res->baseaddr = pci_iomap(pdev, bar, 0);
if (!res->baseaddr) {
ret = -EINVAL;
goto err_iomap;
}
devres_add(&pdev->dev, res);
return res->baseaddr;
err_iomap:
__pcim_release_region(pdev, bar);
err_region:
pcim_addr_devres_free(res);
return IOMEM_ERR_PTR(ret);
}
EXPORT_SYMBOL(pcim_iomap_region);
/**
* pcim_iounmap_region - Unmap and release a PCI BAR
* @pdev: PCI device to operate on
* @bar: Index of BAR to unmap and release
*
* Unmap a BAR and release its region manually. Only pass BARs that were
* previously mapped by pcim_iomap_region().
*/
static void pcim_iounmap_region(struct pci_dev *pdev, int bar)
{
struct pcim_addr_devres res_searched;
pcim_addr_devres_clear(&res_searched);
res_searched.type = PCIM_ADDR_DEVRES_TYPE_REGION_MAPPING;
res_searched.bar = bar;
devres_release(&pdev->dev, pcim_addr_resource_release,
pcim_addr_resources_match, &res_searched);
}
/**
* pcim_iomap_regions - Request and iomap PCI BARs (DEPRECATED)
* @pdev: PCI device to map IO resources for
* @mask: Mask of BARs to request and iomap
* @name: Name associated with the requests
*
* Returns: 0 on success, negative error code on failure.
*
* Request and iomap regions specified by @mask.
*
* This function is DEPRECATED. Do not use it in new code.
* Use pcim_iomap_region() instead.
*/
int pcim_iomap_regions(struct pci_dev *pdev, int mask, const char *name)
{
int ret;
int bar;
void __iomem *mapping;
for (bar = 0; bar < DEVICE_COUNT_RESOURCE; bar++) {
if (!mask_contains_bar(mask, bar))
continue;
mapping = pcim_iomap_region(pdev, bar, name);
if (IS_ERR(mapping)) {
ret = PTR_ERR(mapping);
goto err;
}
ret = pcim_add_mapping_to_legacy_table(pdev, mapping, bar);
if (ret != 0)
goto err;
}
return 0;
err:
while (--bar >= 0) {
pcim_iounmap_region(pdev, bar);
pcim_remove_bar_from_legacy_table(pdev, bar);
}
return ret;
}
EXPORT_SYMBOL(pcim_iomap_regions);
static int _pcim_request_region(struct pci_dev *pdev, int bar, const char *name,
int request_flags)
{
int ret;
struct pcim_addr_devres *res;
res = pcim_addr_devres_alloc(pdev);
if (!res)
return -ENOMEM;
res->type = PCIM_ADDR_DEVRES_TYPE_REGION;
res->bar = bar;
ret = __pcim_request_region(pdev, bar, name, request_flags);
if (ret != 0) {
pcim_addr_devres_free(res);
return ret;
}
devres_add(&pdev->dev, res);
return 0;
}
/**
* pcim_request_region - Request a PCI BAR
* @pdev: PCI device to requestion region for
* @bar: Index of BAR to request
* @name: Name associated with the request
*
* Returns: 0 on success, a negative error code on failure.
*
* Request region specified by @bar.
*
* The region will automatically be released on driver detach. If desired,
* release manually only with pcim_release_region().
*/
int pcim_request_region(struct pci_dev *pdev, int bar, const char *name)
{
return _pcim_request_region(pdev, bar, name, 0);
}
EXPORT_SYMBOL(pcim_request_region);
/**
* pcim_request_region_exclusive - Request a PCI BAR exclusively
* @pdev: PCI device to requestion region for
* @bar: Index of BAR to request
* @name: Name associated with the request
*
* Returns: 0 on success, a negative error code on failure.
*
* Request region specified by @bar exclusively.
*
* The region will automatically be released on driver detach. If desired,
* release manually only with pcim_release_region().
*/
int pcim_request_region_exclusive(struct pci_dev *pdev, int bar, const char *name)
{
return _pcim_request_region(pdev, bar, name, IORESOURCE_EXCLUSIVE);
}
/**
* pcim_release_region - Release a PCI BAR
* @pdev: PCI device to operate on
* @bar: Index of BAR to release
*
* Release a region manually that was previously requested by
* pcim_request_region().
*/
void pcim_release_region(struct pci_dev *pdev, int bar)
{
struct pcim_addr_devres res_searched;
pcim_addr_devres_clear(&res_searched);
res_searched.type = PCIM_ADDR_DEVRES_TYPE_REGION;
res_searched.bar = bar;
devres_release(&pdev->dev, pcim_addr_resource_release,
pcim_addr_resources_match, &res_searched);
}
/**
* pcim_release_all_regions - Release all regions of a PCI-device
* @pdev: the PCI device
*
* Release all regions previously requested through pcim_request_region()
* or pcim_request_all_regions().
*
* Can be called from any context, i.e., not necessarily as a counterpart to
* pcim_request_all_regions().
*/
static void pcim_release_all_regions(struct pci_dev *pdev)
{
int bar;
for (bar = 0; bar < PCI_STD_NUM_BARS; bar++)
pcim_release_region(pdev, bar);
}
/**
* pcim_request_all_regions - Request all regions
* @pdev: PCI device to map IO resources for
* @name: name associated with the request
*
* Returns: 0 on success, negative error code on failure.
*
* Requested regions will automatically be released at driver detach. If
* desired, release individual regions with pcim_release_region() or all of
* them at once with pcim_release_all_regions().
*/
static int pcim_request_all_regions(struct pci_dev *pdev, const char *name)
{
int ret;
int bar;
for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
ret = pcim_request_region(pdev, bar, name);
if (ret != 0)
goto err;
}
return 0;
err:
pcim_release_all_regions(pdev);
return ret;
}
/**
* pcim_iomap_regions_request_all - Request all BARs and iomap specified ones
* (DEPRECATED)
* @pdev: PCI device to map IO resources for
* @mask: Mask of BARs to iomap
* @name: Name associated with the requests
*
* Returns: 0 on success, negative error code on failure.
*
* Request all PCI BARs and iomap regions specified by @mask.
*
* To release these resources manually, call pcim_release_region() for the
* regions and pcim_iounmap() for the mappings.
*
* This function is DEPRECATED. Don't use it in new code. Instead, use one
* of the pcim_* region request functions in combination with a pcim_*
* mapping function.
*/
int pcim_iomap_regions_request_all(struct pci_dev *pdev, int mask,
const char *name)
{
int bar;
int ret;
void __iomem **legacy_iomap_table;
ret = pcim_request_all_regions(pdev, name);
if (ret != 0)
return ret;
for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
if (!mask_contains_bar(mask, bar))
continue;
if (!pcim_iomap(pdev, bar, 0))
goto err;
}
return 0;
err:
/*
* If bar is larger than 0, then pcim_iomap() above has most likely
* failed because of -EINVAL. If it is equal 0, most likely the table
* couldn't be created, indicating -ENOMEM.
*/
ret = bar > 0 ? -EINVAL : -ENOMEM;
legacy_iomap_table = (void __iomem **)pcim_iomap_table(pdev);
while (--bar >= 0)
pcim_iounmap(pdev, legacy_iomap_table[bar]);
pcim_release_all_regions(pdev);
return ret;
}
EXPORT_SYMBOL(pcim_iomap_regions_request_all);
/**
* pcim_iounmap_regions - Unmap and release PCI BARs
* @pdev: PCI device to map IO resources for
* @mask: Mask of BARs to unmap and release
*
* Unmap and release regions specified by @mask.
*/
void pcim_iounmap_regions(struct pci_dev *pdev, int mask)
{
int i;
for (i = 0; i < PCI_STD_NUM_BARS; i++) {
if (!mask_contains_bar(mask, i))
continue;
pcim_iounmap_region(pdev, i);
pcim_remove_bar_from_legacy_table(pdev, i);
}
}
EXPORT_SYMBOL(pcim_iounmap_regions);
/**
* pcim_iomap_range - Create a ranged __iomap mapping within a PCI BAR
* @pdev: PCI device to map IO resources for
* @bar: Index of the BAR
* @offset: Offset from the begin of the BAR
* @len: Length in bytes for the mapping
*
* Returns: __iomem pointer on success, an IOMEM_ERR_PTR on failure.
*
* Creates a new IO-Mapping within the specified @bar, ranging from @offset to
* @offset + @len.
*
* The mapping will automatically get unmapped on driver detach. If desired,
* release manually only with pcim_iounmap().
*/
void __iomem *pcim_iomap_range(struct pci_dev *pdev, int bar,
unsigned long offset, unsigned long len)
{
void __iomem *mapping;
struct pcim_addr_devres *res;
res = pcim_addr_devres_alloc(pdev);
if (!res)
return IOMEM_ERR_PTR(-ENOMEM);
mapping = pci_iomap_range(pdev, bar, offset, len);
if (!mapping) {
pcim_addr_devres_free(res);
return IOMEM_ERR_PTR(-EINVAL);
}
res->type = PCIM_ADDR_DEVRES_TYPE_MAPPING;
res->baseaddr = mapping;
/*
* Ranged mappings don't get added to the legacy-table, since the table
* only ever keeps track of whole BARs.
*/
devres_add(&pdev->dev, res);
return mapping;
}
EXPORT_SYMBOL(pcim_iomap_range);