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All architectures with use set_handle_irq() to set the root chip interrupt handler call that handler from C code, so there's no need for these handlers to be marked asmlinkage. Remove asmlinkage for all handlers registered with set_handle_irq(). Suggested-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Mark Rutland <mark.rutland@arm.com> Link: https://lore.kernel.org/all/20240729112606.1581732-1-ruanjinjie@huawei.com
228 lines
5.8 KiB
C
228 lines
5.8 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* CLPS711X IRQ driver
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*
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* Copyright (C) 2013 Alexander Shiyan <shc_work@mail.ru>
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*/
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/irqchip.h>
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#include <linux/irqdomain.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/slab.h>
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#include <asm/exception.h>
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#include <asm/mach/irq.h>
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#define CLPS711X_INTSR1 (0x0240)
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#define CLPS711X_INTMR1 (0x0280)
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#define CLPS711X_BLEOI (0x0600)
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#define CLPS711X_MCEOI (0x0640)
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#define CLPS711X_TEOI (0x0680)
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#define CLPS711X_TC1EOI (0x06c0)
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#define CLPS711X_TC2EOI (0x0700)
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#define CLPS711X_RTCEOI (0x0740)
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#define CLPS711X_UMSEOI (0x0780)
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#define CLPS711X_COEOI (0x07c0)
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#define CLPS711X_INTSR2 (0x1240)
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#define CLPS711X_INTMR2 (0x1280)
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#define CLPS711X_SRXEOF (0x1600)
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#define CLPS711X_KBDEOI (0x1700)
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#define CLPS711X_INTSR3 (0x2240)
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#define CLPS711X_INTMR3 (0x2280)
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static const struct {
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#define CLPS711X_FLAG_EN (1 << 0)
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#define CLPS711X_FLAG_FIQ (1 << 1)
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unsigned int flags;
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phys_addr_t eoi;
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} clps711x_irqs[] = {
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[1] = { CLPS711X_FLAG_FIQ, CLPS711X_BLEOI, },
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[3] = { CLPS711X_FLAG_FIQ, CLPS711X_MCEOI, },
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[4] = { CLPS711X_FLAG_EN, CLPS711X_COEOI, },
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[5] = { CLPS711X_FLAG_EN, },
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[6] = { CLPS711X_FLAG_EN, },
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[7] = { CLPS711X_FLAG_EN, },
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[8] = { CLPS711X_FLAG_EN, CLPS711X_TC1EOI, },
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[9] = { CLPS711X_FLAG_EN, CLPS711X_TC2EOI, },
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[10] = { CLPS711X_FLAG_EN, CLPS711X_RTCEOI, },
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[11] = { CLPS711X_FLAG_EN, CLPS711X_TEOI, },
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[12] = { CLPS711X_FLAG_EN, },
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[13] = { CLPS711X_FLAG_EN, },
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[14] = { CLPS711X_FLAG_EN, CLPS711X_UMSEOI, },
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[15] = { CLPS711X_FLAG_EN, CLPS711X_SRXEOF, },
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[16] = { CLPS711X_FLAG_EN, CLPS711X_KBDEOI, },
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[17] = { CLPS711X_FLAG_EN, },
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[18] = { CLPS711X_FLAG_EN, },
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[28] = { CLPS711X_FLAG_EN, },
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[29] = { CLPS711X_FLAG_EN, },
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[32] = { CLPS711X_FLAG_FIQ, },
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};
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static struct {
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void __iomem *base;
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void __iomem *intmr[3];
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void __iomem *intsr[3];
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struct irq_domain *domain;
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struct irq_domain_ops ops;
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} *clps711x_intc;
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static void __exception_irq_entry clps711x_irqh(struct pt_regs *regs)
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{
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u32 irqstat;
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do {
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irqstat = readw_relaxed(clps711x_intc->intmr[0]) &
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readw_relaxed(clps711x_intc->intsr[0]);
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if (irqstat)
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generic_handle_domain_irq(clps711x_intc->domain,
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fls(irqstat) - 1);
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irqstat = readw_relaxed(clps711x_intc->intmr[1]) &
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readw_relaxed(clps711x_intc->intsr[1]);
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if (irqstat)
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generic_handle_domain_irq(clps711x_intc->domain,
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fls(irqstat) - 1 + 16);
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} while (irqstat);
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}
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static void clps711x_intc_eoi(struct irq_data *d)
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{
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irq_hw_number_t hwirq = irqd_to_hwirq(d);
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writel_relaxed(0, clps711x_intc->base + clps711x_irqs[hwirq].eoi);
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}
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static void clps711x_intc_mask(struct irq_data *d)
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{
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irq_hw_number_t hwirq = irqd_to_hwirq(d);
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void __iomem *intmr = clps711x_intc->intmr[hwirq / 16];
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u32 tmp;
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tmp = readl_relaxed(intmr);
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tmp &= ~(1 << (hwirq % 16));
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writel_relaxed(tmp, intmr);
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}
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static void clps711x_intc_unmask(struct irq_data *d)
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{
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irq_hw_number_t hwirq = irqd_to_hwirq(d);
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void __iomem *intmr = clps711x_intc->intmr[hwirq / 16];
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u32 tmp;
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tmp = readl_relaxed(intmr);
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tmp |= 1 << (hwirq % 16);
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writel_relaxed(tmp, intmr);
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}
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static struct irq_chip clps711x_intc_chip = {
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.name = "clps711x-intc",
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.irq_eoi = clps711x_intc_eoi,
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.irq_mask = clps711x_intc_mask,
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.irq_unmask = clps711x_intc_unmask,
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};
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static int __init clps711x_intc_irq_map(struct irq_domain *h, unsigned int virq,
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irq_hw_number_t hw)
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{
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irq_flow_handler_t handler = handle_level_irq;
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unsigned int flags = 0;
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if (!clps711x_irqs[hw].flags)
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return 0;
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if (clps711x_irqs[hw].flags & CLPS711X_FLAG_FIQ) {
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handler = handle_bad_irq;
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flags |= IRQ_NOAUTOEN;
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} else if (clps711x_irqs[hw].eoi) {
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handler = handle_fasteoi_irq;
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}
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/* Clear down pending interrupt */
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if (clps711x_irqs[hw].eoi)
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writel_relaxed(0, clps711x_intc->base + clps711x_irqs[hw].eoi);
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irq_set_chip_and_handler(virq, &clps711x_intc_chip, handler);
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irq_modify_status(virq, IRQ_NOPROBE, flags);
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return 0;
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}
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static int __init _clps711x_intc_init(struct device_node *np,
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phys_addr_t base, resource_size_t size)
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{
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int err;
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clps711x_intc = kzalloc(sizeof(*clps711x_intc), GFP_KERNEL);
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if (!clps711x_intc)
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return -ENOMEM;
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clps711x_intc->base = ioremap(base, size);
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if (!clps711x_intc->base) {
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err = -ENOMEM;
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goto out_kfree;
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}
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clps711x_intc->intsr[0] = clps711x_intc->base + CLPS711X_INTSR1;
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clps711x_intc->intmr[0] = clps711x_intc->base + CLPS711X_INTMR1;
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clps711x_intc->intsr[1] = clps711x_intc->base + CLPS711X_INTSR2;
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clps711x_intc->intmr[1] = clps711x_intc->base + CLPS711X_INTMR2;
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clps711x_intc->intsr[2] = clps711x_intc->base + CLPS711X_INTSR3;
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clps711x_intc->intmr[2] = clps711x_intc->base + CLPS711X_INTMR3;
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/* Mask all interrupts */
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writel_relaxed(0, clps711x_intc->intmr[0]);
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writel_relaxed(0, clps711x_intc->intmr[1]);
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writel_relaxed(0, clps711x_intc->intmr[2]);
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err = irq_alloc_descs(-1, 0, ARRAY_SIZE(clps711x_irqs), numa_node_id());
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if (err < 0)
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goto out_iounmap;
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clps711x_intc->ops.map = clps711x_intc_irq_map;
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clps711x_intc->ops.xlate = irq_domain_xlate_onecell;
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clps711x_intc->domain =
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irq_domain_add_legacy(np, ARRAY_SIZE(clps711x_irqs),
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0, 0, &clps711x_intc->ops, NULL);
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if (!clps711x_intc->domain) {
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err = -ENOMEM;
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goto out_irqfree;
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}
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irq_set_default_host(clps711x_intc->domain);
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set_handle_irq(clps711x_irqh);
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#ifdef CONFIG_FIQ
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init_FIQ(0);
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#endif
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return 0;
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out_irqfree:
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irq_free_descs(0, ARRAY_SIZE(clps711x_irqs));
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out_iounmap:
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iounmap(clps711x_intc->base);
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out_kfree:
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kfree(clps711x_intc);
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return err;
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}
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static int __init clps711x_intc_init_dt(struct device_node *np,
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struct device_node *parent)
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{
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struct resource res;
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int err;
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err = of_address_to_resource(np, 0, &res);
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if (err)
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return err;
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return _clps711x_intc_init(np, res.start, resource_size(&res));
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}
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IRQCHIP_DECLARE(clps711x, "cirrus,ep7209-intc", clps711x_intc_init_dt);
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