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The Intel IOMMU code currently tries to allocate all DMAR fault interrupt vectors on the boot cpu. On large systems with high DMAR counts this results in vector exhaustion, and most of the vectors are not initially allocated socket local. Instead, have a cpu on each node do the vector allocation for the DMARs on that node. The boot cpu still does the allocation for its node during its boot sequence. Signed-off-by: Dimitri Sivanich <sivanich@hpe.com> Reviewed-by: Kevin Tian <kevin.tian@intel.com> Link: https://lore.kernel.org/r/Zfydpp2Hm+as16TY@hpe.com Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
60 lines
1.4 KiB
C
60 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2012 Advanced Micro Devices, Inc.
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* Author: Joerg Roedel <jroedel@suse.de>
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*
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* This header file contains stuff that is shared between different interrupt
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* remapping drivers but with no need to be visible outside of the IOMMU layer.
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*/
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#ifndef __IRQ_REMAPPING_H
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#define __IRQ_REMAPPING_H
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#ifdef CONFIG_IRQ_REMAP
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struct irq_data;
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struct msi_msg;
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struct irq_domain;
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struct irq_alloc_info;
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extern int irq_remap_broken;
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extern int disable_sourceid_checking;
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extern int no_x2apic_optout;
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extern int irq_remapping_enabled;
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extern int disable_irq_post;
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struct irq_remap_ops {
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/* The supported capabilities */
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int capability;
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/* Initializes hardware and makes it ready for remapping interrupts */
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int (*prepare)(void);
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/* Enables the remapping hardware */
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int (*enable)(void);
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/* Disables the remapping hardware */
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void (*disable)(void);
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/* Reenables the remapping hardware */
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int (*reenable)(int);
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/* Enable fault handling */
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int (*enable_faulting)(unsigned int);
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};
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extern struct irq_remap_ops intel_irq_remap_ops;
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extern struct irq_remap_ops amd_iommu_irq_ops;
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extern struct irq_remap_ops hyperv_irq_remap_ops;
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#else /* CONFIG_IRQ_REMAP */
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#define irq_remapping_enabled 0
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#define irq_remap_broken 0
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#define disable_irq_post 1
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#endif /* CONFIG_IRQ_REMAP */
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#endif /* __IRQ_REMAPPING_H */
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