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With ARCH=arm64 make allmodconfig && make W=1 C=1 reports: WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/edac/layerscape_edac_mod.o Add the missing invocation of the MODULE_DESCRIPTION() macro to all files which have a MODULE_LICENSE(). This includes mpc85xx_edac.c and four octeon_edac-*.c files which, although they did not produce a warning with the arm64 allmodconfig configuration, may cause this warning with other configurations. [ bp: s/module/driver/ for layerscape_edac ] Signed-off-by: Jeff Johnson <quic_jjohnson@quicinc.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/r/20240617-md-arm64-drivers-edac-v2-1-6d6c5dd1e5da@quicinc.com
207 lines
5.3 KiB
C
207 lines
5.3 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2012 Cavium, Inc.
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*
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* Copyright (C) 2009 Wind River Systems,
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* written by Ralf Baechle <ralf@linux-mips.org>
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/slab.h>
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#include <linux/io.h>
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#include <linux/edac.h>
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#include <asm/octeon/cvmx.h>
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#include "edac_module.h"
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#define EDAC_MOD_STR "octeon-l2c"
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static void octeon_l2c_poll_oct1(struct edac_device_ctl_info *l2c)
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{
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union cvmx_l2t_err l2t_err, l2t_err_reset;
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union cvmx_l2d_err l2d_err, l2d_err_reset;
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l2t_err_reset.u64 = 0;
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l2t_err.u64 = cvmx_read_csr(CVMX_L2T_ERR);
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if (l2t_err.s.sec_err) {
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edac_device_handle_ce(l2c, 0, 0,
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"Tag Single bit error (corrected)");
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l2t_err_reset.s.sec_err = 1;
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}
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if (l2t_err.s.ded_err) {
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edac_device_handle_ue(l2c, 0, 0,
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"Tag Double bit error (detected)");
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l2t_err_reset.s.ded_err = 1;
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}
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if (l2t_err_reset.u64)
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cvmx_write_csr(CVMX_L2T_ERR, l2t_err_reset.u64);
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l2d_err_reset.u64 = 0;
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l2d_err.u64 = cvmx_read_csr(CVMX_L2D_ERR);
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if (l2d_err.s.sec_err) {
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edac_device_handle_ce(l2c, 0, 1,
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"Data Single bit error (corrected)");
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l2d_err_reset.s.sec_err = 1;
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}
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if (l2d_err.s.ded_err) {
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edac_device_handle_ue(l2c, 0, 1,
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"Data Double bit error (detected)");
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l2d_err_reset.s.ded_err = 1;
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}
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if (l2d_err_reset.u64)
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cvmx_write_csr(CVMX_L2D_ERR, l2d_err_reset.u64);
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}
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static void _octeon_l2c_poll_oct2(struct edac_device_ctl_info *l2c, int tad)
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{
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union cvmx_l2c_err_tdtx err_tdtx, err_tdtx_reset;
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union cvmx_l2c_err_ttgx err_ttgx, err_ttgx_reset;
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char buf1[64];
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char buf2[80];
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err_tdtx_reset.u64 = 0;
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err_tdtx.u64 = cvmx_read_csr(CVMX_L2C_ERR_TDTX(tad));
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if (err_tdtx.s.dbe || err_tdtx.s.sbe ||
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err_tdtx.s.vdbe || err_tdtx.s.vsbe)
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snprintf(buf1, sizeof(buf1),
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"type:%d, syn:0x%x, way:%d",
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err_tdtx.s.type, err_tdtx.s.syn, err_tdtx.s.wayidx);
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if (err_tdtx.s.dbe) {
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snprintf(buf2, sizeof(buf2),
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"L2D Double bit error (detected):%s", buf1);
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err_tdtx_reset.s.dbe = 1;
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edac_device_handle_ue(l2c, tad, 1, buf2);
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}
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if (err_tdtx.s.sbe) {
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snprintf(buf2, sizeof(buf2),
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"L2D Single bit error (corrected):%s", buf1);
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err_tdtx_reset.s.sbe = 1;
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edac_device_handle_ce(l2c, tad, 1, buf2);
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}
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if (err_tdtx.s.vdbe) {
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snprintf(buf2, sizeof(buf2),
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"VBF Double bit error (detected):%s", buf1);
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err_tdtx_reset.s.vdbe = 1;
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edac_device_handle_ue(l2c, tad, 1, buf2);
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}
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if (err_tdtx.s.vsbe) {
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snprintf(buf2, sizeof(buf2),
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"VBF Single bit error (corrected):%s", buf1);
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err_tdtx_reset.s.vsbe = 1;
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edac_device_handle_ce(l2c, tad, 1, buf2);
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}
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if (err_tdtx_reset.u64)
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cvmx_write_csr(CVMX_L2C_ERR_TDTX(tad), err_tdtx_reset.u64);
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err_ttgx_reset.u64 = 0;
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err_ttgx.u64 = cvmx_read_csr(CVMX_L2C_ERR_TTGX(tad));
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if (err_ttgx.s.dbe || err_ttgx.s.sbe)
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snprintf(buf1, sizeof(buf1),
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"type:%d, syn:0x%x, way:%d",
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err_ttgx.s.type, err_ttgx.s.syn, err_ttgx.s.wayidx);
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if (err_ttgx.s.dbe) {
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snprintf(buf2, sizeof(buf2),
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"Tag Double bit error (detected):%s", buf1);
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err_ttgx_reset.s.dbe = 1;
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edac_device_handle_ue(l2c, tad, 0, buf2);
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}
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if (err_ttgx.s.sbe) {
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snprintf(buf2, sizeof(buf2),
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"Tag Single bit error (corrected):%s", buf1);
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err_ttgx_reset.s.sbe = 1;
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edac_device_handle_ce(l2c, tad, 0, buf2);
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}
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if (err_ttgx_reset.u64)
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cvmx_write_csr(CVMX_L2C_ERR_TTGX(tad), err_ttgx_reset.u64);
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}
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static void octeon_l2c_poll_oct2(struct edac_device_ctl_info *l2c)
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{
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int i;
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for (i = 0; i < l2c->nr_instances; i++)
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_octeon_l2c_poll_oct2(l2c, i);
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}
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static int octeon_l2c_probe(struct platform_device *pdev)
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{
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struct edac_device_ctl_info *l2c;
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int num_tads = OCTEON_IS_MODEL(OCTEON_CN68XX) ? 4 : 1;
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/* 'Tags' are block 0, 'Data' is block 1*/
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l2c = edac_device_alloc_ctl_info(0, "l2c", num_tads, "l2c", 2, 0,
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edac_device_alloc_index());
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if (!l2c)
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return -ENOMEM;
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l2c->dev = &pdev->dev;
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platform_set_drvdata(pdev, l2c);
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l2c->dev_name = dev_name(&pdev->dev);
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l2c->mod_name = "octeon-l2c";
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l2c->ctl_name = "octeon_l2c_err";
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if (OCTEON_IS_OCTEON1PLUS()) {
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union cvmx_l2t_err l2t_err;
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union cvmx_l2d_err l2d_err;
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l2t_err.u64 = cvmx_read_csr(CVMX_L2T_ERR);
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l2t_err.s.sec_intena = 0; /* We poll */
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l2t_err.s.ded_intena = 0;
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cvmx_write_csr(CVMX_L2T_ERR, l2t_err.u64);
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l2d_err.u64 = cvmx_read_csr(CVMX_L2D_ERR);
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l2d_err.s.sec_intena = 0; /* We poll */
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l2d_err.s.ded_intena = 0;
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cvmx_write_csr(CVMX_L2T_ERR, l2d_err.u64);
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l2c->edac_check = octeon_l2c_poll_oct1;
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} else {
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/* OCTEON II */
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l2c->edac_check = octeon_l2c_poll_oct2;
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}
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if (edac_device_add_device(l2c) > 0) {
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pr_err("%s: edac_device_add_device() failed\n", __func__);
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goto err;
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}
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return 0;
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err:
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edac_device_free_ctl_info(l2c);
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return -ENXIO;
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}
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static void octeon_l2c_remove(struct platform_device *pdev)
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{
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struct edac_device_ctl_info *l2c = platform_get_drvdata(pdev);
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edac_device_del_device(&pdev->dev);
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edac_device_free_ctl_info(l2c);
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}
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static struct platform_driver octeon_l2c_driver = {
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.probe = octeon_l2c_probe,
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.remove_new = octeon_l2c_remove,
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.driver = {
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.name = "octeon_l2c_edac",
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}
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};
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module_platform_driver(octeon_l2c_driver);
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MODULE_DESCRIPTION("Cavium Octeon Secondary Caches (L2C) EDAC driver");
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
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