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Author SHA1 Message Date
cheslin23t
8f6b62a516
Merge a90372f4e6 into baeb9a7d8b 2024-09-20 12:41:25 +08:00
Linus Torvalds
baeb9a7d8b Enable PREEMPT_RT on supported architectures:
After twenty years of development we finally reached the point to enable
   PREEMPT_RT support in the mainline kernel.
 
   All prerequisites are merged, so enable it on the supported architectures
   ARM64, RISCV and X86(32/64-bit).
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Merge tag 'sched-rt-2024-09-17' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull RT enablement from Thomas Gleixner:
 "Enable PREEMPT_RT on supported architectures:

  After twenty years of development we finally reached the point to
  enable PREEMPT_RT support in the mainline kernel.

  All prerequisites are merged, so enable it on the supported
  architectures ARM64, RISCV and X86(32/64-bit)"

* tag 'sched-rt-2024-09-17' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  riscv: Allow to enable PREEMPT_RT.
  arm64: Allow to enable PREEMPT_RT.
  x86: Allow to enable PREEMPT_RT.
2024-09-20 06:04:27 +02:00
Sebastian Andrzej Siewior
2638e4e6b1 riscv: Allow to enable PREEMPT_RT.
It is really time.

riscv has all the required architecture related changes, that have been
identified over time, in order to enable PREEMPT_RT. With the recent
printk changes, the last known road block has been addressed.

Allow to enable PREEMPT_RT on riscv.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Nam Cao <namcao@linutronix.de> # Visionfive 2
Link: https://lore.kernel.org/all/20240906111841.562402-4-bigeasy@linutronix.de
2024-09-17 11:06:08 +02:00
Sebastian Andrzej Siewior
d8fccd9ca5 arm64: Allow to enable PREEMPT_RT.
It is really time.

arm64 has all the required architecture related changes, that have been
identified over time, in order to enable PREEMPT_RT. With the recent
printk changes, the last known road block has been addressed.

Allow to enable PREEMPT_RT on arm64.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/all/20240906111841.562402-3-bigeasy@linutronix.de
2024-09-17 11:06:02 +02:00
Sebastian Andrzej Siewior
d2d6422f8b x86: Allow to enable PREEMPT_RT.
It is really time.

x86 has all the required architecture related changes, that have been
identified over time, in order to enable PREEMPT_RT. With the recent
printk changes, the last known road block has been addressed.

Allow to enable PREEMPT_RT on x86.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/all/20240906111841.562402-2-bigeasy@linutronix.de
2024-09-17 11:05:53 +02:00
cheslin23t
a90372f4e6
Create SECURITY.md 2024-07-25 00:35:40 -04:00
4 changed files with 4 additions and 0 deletions

1
SECURITY.md Normal file
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@ -0,0 +1 @@
memory leak triggered if network buffers get too large

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@ -101,6 +101,7 @@ config ARM64
select ARCH_SUPPORTS_NUMA_BALANCING
select ARCH_SUPPORTS_PAGE_TABLE_CHECK
select ARCH_SUPPORTS_PER_VMA_LOCK
select ARCH_SUPPORTS_RT
select ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH
select ARCH_WANT_COMPAT_IPC_PARSE_VERSION if COMPAT
select ARCH_WANT_DEFAULT_BPF_JIT

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@ -65,6 +65,7 @@ config RISCV
select ARCH_SUPPORTS_LTO_CLANG_THIN if LLD_VERSION >= 140000
select ARCH_SUPPORTS_PAGE_TABLE_CHECK if MMU
select ARCH_SUPPORTS_PER_VMA_LOCK if MMU
select ARCH_SUPPORTS_RT
select ARCH_SUPPORTS_SHADOW_CALL_STACK if HAVE_SHADOW_CALL_STACK
select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
select ARCH_USE_MEMTEST

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@ -124,6 +124,7 @@ config X86
select ARCH_USES_CFI_TRAPS if X86_64 && CFI_CLANG
select ARCH_SUPPORTS_LTO_CLANG
select ARCH_SUPPORTS_LTO_CLANG_THIN
select ARCH_SUPPORTS_RT
select ARCH_USE_BUILTIN_BSWAP
select ARCH_USE_CMPXCHG_LOCKREF if X86_CMPXCHG64
select ARCH_USE_MEMTEST