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Author SHA1 Message Date
Yaimsputnik
a99b5791dd
Merge 7344c311f4 into baeb9a7d8b 2024-09-20 00:51:38 -04:00
Linus Torvalds
baeb9a7d8b Enable PREEMPT_RT on supported architectures:
After twenty years of development we finally reached the point to enable
   PREEMPT_RT support in the mainline kernel.
 
   All prerequisites are merged, so enable it on the supported architectures
   ARM64, RISCV and X86(32/64-bit).
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Merge tag 'sched-rt-2024-09-17' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull RT enablement from Thomas Gleixner:
 "Enable PREEMPT_RT on supported architectures:

  After twenty years of development we finally reached the point to
  enable PREEMPT_RT support in the mainline kernel.

  All prerequisites are merged, so enable it on the supported
  architectures ARM64, RISCV and X86(32/64-bit)"

* tag 'sched-rt-2024-09-17' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  riscv: Allow to enable PREEMPT_RT.
  arm64: Allow to enable PREEMPT_RT.
  x86: Allow to enable PREEMPT_RT.
2024-09-20 06:04:27 +02:00
Sebastian Andrzej Siewior
2638e4e6b1 riscv: Allow to enable PREEMPT_RT.
It is really time.

riscv has all the required architecture related changes, that have been
identified over time, in order to enable PREEMPT_RT. With the recent
printk changes, the last known road block has been addressed.

Allow to enable PREEMPT_RT on riscv.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Nam Cao <namcao@linutronix.de> # Visionfive 2
Link: https://lore.kernel.org/all/20240906111841.562402-4-bigeasy@linutronix.de
2024-09-17 11:06:08 +02:00
Sebastian Andrzej Siewior
d8fccd9ca5 arm64: Allow to enable PREEMPT_RT.
It is really time.

arm64 has all the required architecture related changes, that have been
identified over time, in order to enable PREEMPT_RT. With the recent
printk changes, the last known road block has been addressed.

Allow to enable PREEMPT_RT on arm64.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/all/20240906111841.562402-3-bigeasy@linutronix.de
2024-09-17 11:06:02 +02:00
Sebastian Andrzej Siewior
d2d6422f8b x86: Allow to enable PREEMPT_RT.
It is really time.

x86 has all the required architecture related changes, that have been
identified over time, in order to enable PREEMPT_RT. With the recent
printk changes, the last known road block has been addressed.

Allow to enable PREEMPT_RT on x86.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/all/20240906111841.562402-2-bigeasy@linutronix.de
2024-09-17 11:05:53 +02:00
Yaimsputnik
7344c311f4
Update crash_reserve.c
- Typo Fix: Corrected the typo in the error message for the @ character check.

- Consistent Error Messages: Added more descriptive and consistent error messages.

- Dead Loop Prevention: Added a retry counter with a maximum limit to prevent infinite loops during memory reservation retries.

- Resource Management: Ensured that resources are cleaned up properly on error paths to avoid memory leaks and other issues.
2024-09-03 20:06:33 -04:00
4 changed files with 18 additions and 5 deletions

View File

@ -101,6 +101,7 @@ config ARM64
select ARCH_SUPPORTS_NUMA_BALANCING select ARCH_SUPPORTS_NUMA_BALANCING
select ARCH_SUPPORTS_PAGE_TABLE_CHECK select ARCH_SUPPORTS_PAGE_TABLE_CHECK
select ARCH_SUPPORTS_PER_VMA_LOCK select ARCH_SUPPORTS_PER_VMA_LOCK
select ARCH_SUPPORTS_RT
select ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH select ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH
select ARCH_WANT_COMPAT_IPC_PARSE_VERSION if COMPAT select ARCH_WANT_COMPAT_IPC_PARSE_VERSION if COMPAT
select ARCH_WANT_DEFAULT_BPF_JIT select ARCH_WANT_DEFAULT_BPF_JIT

View File

@ -65,6 +65,7 @@ config RISCV
select ARCH_SUPPORTS_LTO_CLANG_THIN if LLD_VERSION >= 140000 select ARCH_SUPPORTS_LTO_CLANG_THIN if LLD_VERSION >= 140000
select ARCH_SUPPORTS_PAGE_TABLE_CHECK if MMU select ARCH_SUPPORTS_PAGE_TABLE_CHECK if MMU
select ARCH_SUPPORTS_PER_VMA_LOCK if MMU select ARCH_SUPPORTS_PER_VMA_LOCK if MMU
select ARCH_SUPPORTS_RT
select ARCH_SUPPORTS_SHADOW_CALL_STACK if HAVE_SHADOW_CALL_STACK select ARCH_SUPPORTS_SHADOW_CALL_STACK if HAVE_SHADOW_CALL_STACK
select ARCH_USE_CMPXCHG_LOCKREF if 64BIT select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
select ARCH_USE_MEMTEST select ARCH_USE_MEMTEST

View File

@ -124,6 +124,7 @@ config X86
select ARCH_USES_CFI_TRAPS if X86_64 && CFI_CLANG select ARCH_USES_CFI_TRAPS if X86_64 && CFI_CLANG
select ARCH_SUPPORTS_LTO_CLANG select ARCH_SUPPORTS_LTO_CLANG
select ARCH_SUPPORTS_LTO_CLANG_THIN select ARCH_SUPPORTS_LTO_CLANG_THIN
select ARCH_SUPPORTS_RT
select ARCH_USE_BUILTIN_BSWAP select ARCH_USE_BUILTIN_BSWAP
select ARCH_USE_CMPXCHG_LOCKREF if X86_CMPXCHG64 select ARCH_USE_CMPXCHG_LOCKREF if X86_CMPXCHG64
select ARCH_USE_MEMTEST select ARCH_USE_MEMTEST

View File

@ -86,7 +86,7 @@ static int __init parse_crashkernel_mem(char *cmdline,
} }
cur++; cur++;
/* if no ':' is here, than we read the end */ /* if no ':' is here, then we read the end */
if (*cur != ':') { if (*cur != ':') {
end = memparse(cur, &tmp); end = memparse(cur, &tmp);
if (cur == tmp) { if (cur == tmp) {
@ -131,12 +131,13 @@ static int __init parse_crashkernel_mem(char *cmdline,
cur++; cur++;
*crash_base = memparse(cur, &tmp); *crash_base = memparse(cur, &tmp);
if (cur == tmp) { if (cur == tmp) {
pr_warn("crahskernel: Memory value expected after '@'\n"); pr_warn("crashkernel: Memory value expected after '@'\n"); // Fixed typo
return -EINVAL; return -EINVAL;
} }
} }
} else } else {
pr_info("crashkernel size resulted in zero bytes\n"); pr_info("crashkernel size resulted in zero bytes\n");
}
return 0; return 0;
} }
@ -180,7 +181,7 @@ static __initdata char *suffix_tbl[] = {
}; };
/* /*
* That function parses "suffix" crashkernel command lines like * That function parses "suffix" crashkernel command lines like
* *
* crashkernel=size,[high|low] * crashkernel=size,[high|low]
* *
@ -332,8 +333,10 @@ int __init parse_crashkernel(char *cmdline,
*high = true; *high = true;
} }
#endif #endif
if (!*crash_size) if (!*crash_size) {
pr_warn("crashkernel: calculated crash size is zero\n");
ret = -EINVAL; ret = -EINVAL;
}
return ret; return ret;
} }
@ -380,6 +383,8 @@ void __init reserve_crashkernel_generic(char *cmdline,
{ {
unsigned long long search_end = CRASH_ADDR_LOW_MAX, search_base = 0; unsigned long long search_end = CRASH_ADDR_LOW_MAX, search_base = 0;
bool fixed_base = false; bool fixed_base = false;
int retry_count = 0;
const int max_retries = 5; // To prevent infinite loops
/* User specifies base address explicitly. */ /* User specifies base address explicitly. */
if (crash_base) { if (crash_base) {
@ -395,6 +400,11 @@ retry:
crash_base = memblock_phys_alloc_range(crash_size, CRASH_ALIGN, crash_base = memblock_phys_alloc_range(crash_size, CRASH_ALIGN,
search_base, search_end); search_base, search_end);
if (!crash_base) { if (!crash_base) {
if (retry_count++ >= max_retries) {
pr_warn("crashkernel reservation failed after maximum retries.\n");
return;
}
/* /*
* For crashkernel=size[KMG]@offset[KMG], print out failure * For crashkernel=size[KMG]@offset[KMG], print out failure
* message if can't reserve the specified region. * message if can't reserve the specified region.