Commit Graph

104791 Commits

Author SHA1 Message Date
Thomas Renninger
f77cfe4ea2 cpuidle/x86/perf: fix power:cpu_idle double end events and throw cpu_idle events from the cpuidle layer
Currently intel_idle and acpi_idle driver show double cpu_idle "exit idle"
events -> this patch fixes it and makes cpu_idle events throwing less complex.

It also introduces cpu_idle events for all architectures which use
the cpuidle subsystem, namely:
  - arch/arm/mach-at91/cpuidle.c
  - arch/arm/mach-davinci/cpuidle.c
  - arch/arm/mach-kirkwood/cpuidle.c
  - arch/arm/mach-omap2/cpuidle34xx.c
  - arch/drivers/acpi/processor_idle.c (for all cases, not only mwait)
  - arch/x86/kernel/process.c (did throw events before, but was a mess)
  - drivers/idle/intel_idle.c (did throw events before)

Convention should be:
Fire cpu_idle events inside the current pm_idle function (not somewhere
down the the callee tree) to keep things easy.

Current possible pm_idle functions in X86:
c1e_idle, poll_idle, cpuidle_idle_call, mwait_idle, default_idle
-> this is really easy is now.

This affects userspace:
The type field of the cpu_idle power event can now direclty get
mapped to:
/sys/devices/system/cpu/cpuX/cpuidle/stateX/{name,desc,usage,time,...}
instead of throwing very CPU/mwait specific values.
This change is not visible for the intel_idle driver.
For the acpi_idle driver it should only be visible if the vendor
misses out C-states in his BIOS.
Another (perf timechart) patch reads out cpuidle info of cpu_idle
events from:
/sys/.../cpuidle/stateX/*, then the cpuidle events are mapped
to the correct C-/cpuidle state again, even if e.g. vendors miss
out C-states in their BIOS and for example only export C1 and C3.
-> everything is fine.

Signed-off-by: Thomas Renninger <trenn@suse.de>
CC: Robert Schoene <robert.schoene@tu-dresden.de>
CC: Jean Pihet <j-pihet@ti.com>
CC: Arjan van de Ven <arjan@linux.intel.com>
CC: Ingo Molnar <mingo@elte.hu>
CC: Frederic Weisbecker <fweisbec@gmail.com>
CC: linux-pm@lists.linux-foundation.org
CC: linux-acpi@vger.kernel.org
CC: linux-kernel@vger.kernel.org
CC: linux-perf-users@vger.kernel.org
CC: linux-omap@vger.kernel.org
Signed-off-by: Len Brown <len.brown@intel.com>
2011-01-12 18:05:16 -05:00
Linus Torvalds
f878133bf0 Merge branch 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (39 commits)
  i915/gtt: fix ordering causing DMAR errors on object teardown.
  i915/gtt: fix ordering issues with status setup and DMAR
  drm/i915/execbuffer: Reorder binding of objects to favour restrictions
  drm/i915: If we hit OOM when allocating GTT pages, clear the aperture
  drm/i915/evict: Ensure we completely cleanup on failure
  drm/i915/execbuffer: Correctly clear the current object list upon EFAULT
  drm/i915/debugfs: Show all objects in the gtt
  drm/i915: Record AGP memory type upon error
  drm/i915: Periodically flush the active lists and requests
  drm/i915/gtt: Unmap the PCI pages after unbinding them from the GTT
  drm/i915: Record the error batchbuffer on each ring
  drm/i915: Include TLB miss overhead for computing WM
  drm/i915: Propagate error from flushing the ring
  drm/i915: detect & report PCH display error interrupts
  drm/i915: cleanup rc6 code
  drm/i915: fix rc6 enabling around suspend/resume
  drm/i915: re-enable rc6 support for Ironlake+
  drm/i915: Make the ring IMR handling private
  drm/i915/ringbuffer: Simplify the ring irq refcounting
  drm/i915/debugfs: Show the per-ring IMR
  ...
2011-01-12 08:40:25 -08:00
Linus Torvalds
94d4c4cd56 Merge branch 'stable/xenbus' of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen
* 'stable/xenbus' of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen:
  xen/xenbus: making backend support modular is too complex
  xen/pci: Make xen-pcifront be dependent on XEN_XENBUS_FRONTEND
  xen/xenbus: fixup checkpatch issues in xenbus_probe*
  xen/netfront: select XEN_XENBUS_FRONTEND
  xen/xenbus: clean up noise in xenbus_probe_frontend.c
  xen/xenbus: clean up noise in xenbus_probe_backend.c
  xen/xenbus: clean up noise in xenbus_probe.c
  xen/xenbus: cleanup debug noise in xenbus_comms.c
  xen/xenbus: clean up error handling
  xen/xenbus: make frontend bus GPL
  xen/xenbus: make sure backend bus is registered earlier
  xenbus/frontend: register bus earlier
  xen: remove xen/evtchn.h
  xen: add backend driver support
  xen: separate out frontend xenbus
2011-01-12 08:37:35 -08:00
Dave Airlie
d15eda5c6e i915/gtt: fix ordering causing DMAR errors on object teardown.
Previous to the last GTT rework we always rewrote the GTT then unmapped the
object, somehow this got reversed in the rework in 2.6.37-rc5 timeframe.

This fix needs to go to stable in an alternate form since the code changed.

This fixes DMAR reports on my Ironlake HP2540p.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-01-12 11:39:48 +10:00
Dave Airlie
a46f3108b1 i915/gtt: fix ordering issues with status setup and DMAR
This code was setting up the status page before setting the DMAR-is-on-bit,
so we were getting DMAR errors on the status page. Reverse the two bits
of init code to the correct result.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-01-12 11:38:37 +10:00
Dave Airlie
784fe39fa8 Merge branch 'drm-intel-fixes' of ssh://master.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel
* 'drm-intel-fixes' of ssh://master.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel: (37 commits)
  drm/i915/execbuffer: Reorder binding of objects to favour restrictions
  drm/i915: If we hit OOM when allocating GTT pages, clear the aperture
  drm/i915/evict: Ensure we completely cleanup on failure
  drm/i915/execbuffer: Correctly clear the current object list upon EFAULT
  drm/i915/debugfs: Show all objects in the gtt
  drm/i915: Record AGP memory type upon error
  drm/i915: Periodically flush the active lists and requests
  drm/i915/gtt: Unmap the PCI pages after unbinding them from the GTT
  drm/i915: Record the error batchbuffer on each ring
  drm/i915: Include TLB miss overhead for computing WM
  drm/i915: Propagate error from flushing the ring
  drm/i915: detect & report PCH display error interrupts
  drm/i915: cleanup rc6 code
  drm/i915: fix rc6 enabling around suspend/resume
  drm/i915: re-enable rc6 support for Ironlake+
  drm/i915: Make the ring IMR handling private
  drm/i915/ringbuffer: Simplify the ring irq refcounting
  drm/i915/debugfs: Show the per-ring IMR
  drm/i915: Mask USER interrupts on gen6 (until required)
  drm/i915: Handle ringbuffer stalls when flushing
  ...
2011-01-12 10:49:03 +10:00
Linus Torvalds
4162cf6497 Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6: (67 commits)
  cxgb4vf: recover from failure in cxgb4vf_open()
  netfilter: ebtables: make broute table work again
  netfilter: fix race in conntrack between dump_table and destroy
  ah: reload pointers to skb data after calling skb_cow_data()
  ah: update maximum truncated ICV length
  xfrm: check trunc_len in XFRMA_ALG_AUTH_TRUNC
  ehea: Increase the skb array usage
  net/fec: remove config FEC2 as it's used nowhere
  pcnet_cs: add new_id
  tcp: disallow bind() to reuse addr/port
  net/r8169: Update the function of parsing firmware
  net: ppp: use {get,put}_unaligned_be{16,32}
  CAIF: Fix IPv6 support in receive path for GPRS/3G
  arp: allow to invalidate specific ARP entries
  net_sched: factorize qdisc stats handling
  mlx4: Call alloc_etherdev to allocate RX and TX queues
  net: Add alloc_netdev_mqs function
  caif: don't set connection request param size before copying data
  cxgb4vf: fix mailbox data/control coherency domain race
  qlcnic: change module parameter permissions
  ...
2011-01-11 16:32:41 -08:00
Linus Torvalds
5a62f99544 Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (72 commits)
  powerpc/pseries: Fix build of topology stuff without CONFIG_NUMA
  powerpc/pseries: Fix VPHN build errors on non-SMP systems
  powerpc/83xx: add mpc8308_p1m DMA controller device-tree node
  powerpc/83xx: add DMA controller to mpc8308 device-tree node
  powerpc/512x: try to free dma descriptors in case of allocation failure
  powerpc/512x: add MPC8308 dma support
  powerpc/512x: fix the hanged dma transfer issue
  powerpc/512x: scatter/gather dma fix
  powerpc/powermac: Make auto-loading of therm_pm72 possible
  of/address: Use propper endianess in get_flags
  powerpc/pci: Use printf extension %pR for struct resource
  powerpc: Remove unnecessary casts of void ptr
  powerpc: Disable VPHN polling during a suspend operation
  powerpc/pseries: Poll VPA for topology changes and update NUMA maps
  powerpc: iommu: Add device name to iommu error printks
  powerpc: Record vma->phys_addr in ioremap()
  powerpc: Update compat_arch_ptrace
  powerpc: Fix PPC_PTRACE_SETHWDEBUG on PPC_BOOK3S
  powerpc/time: printk time stamp init not correct
  powerpc: Minor cleanups for machdep.h
  ...
2011-01-11 16:31:41 -08:00
Linus Torvalds
f1d6d6cd90 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband: (42 commits)
  IB/qib: Fix refcount leak in lkey/rkey validation
  IB/qib: Improve SERDES tunning on QMH boards
  IB/qib: Unnecessary delayed completions on RC connection
  IB/qib: Issue pre-emptive NAKs on eager buffer overflow
  IB/qib: RDMA lkey/rkey validation is inefficient for large MRs
  IB/qib: Change QPN increment
  IB/qib: Add fix missing from earlier patch
  IB/qib: Change receive queue/QPN selection
  IB/qib: Fix interrupt mitigation
  IB/qib: Avoid duplicate writes to the rcv head register
  IB/qib: Add a few new SERDES tunings
  IB/qib: Reset packet list after freeing
  IB/qib: New SERDES init routine and improvements to SI quality
  IB/qib: Clear WAIT_SEND flags when setting QP to error state
  IB/qib: Fix context allocation with multiple HCAs
  IB/qib: Fix multi-Florida HCA host panic on reboot
  IB/qib: Handle transitions from ACTIVE_DEFERRED to ACTIVE better
  IB/qib: UD send with immediate receive completion has wrong size
  IB/qib: Set port physical state even if other fields are invalid
  IB/qib: Generate completion callback on errors
  ...
2011-01-11 16:30:08 -08:00
Casey Leedom
343a8d13aa cxgb4vf: recover from failure in cxgb4vf_open()
If the Link Start fails in cxgb4vf_open(), we need to back out any state
that we've built up ...

Signed-off-by: Casey Leedom <leedom@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2011-01-11 15:44:40 -08:00
Chris Wilson
6fe4f14044 drm/i915/execbuffer: Reorder binding of objects to favour restrictions
As the mappable portion of the aperture is always a small subset at the
start of the GTT, it is allocated preferentially by drm_mm. This is
useful in case we ever need to map an object later. However, if you have
a large object that can consume the entire mappable region of the
GTT this prevents the batchbuffer from fitting and so causing an error.
Instead allocate all those that require a mapping up front in order to
improve the likelihood of finding sufficient space to bind them.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-11 22:55:48 +00:00
Chris Wilson
809b63349c drm/i915: If we hit OOM when allocating GTT pages, clear the aperture
Rather than evicting an object at random, which is unlikely to alleviate
the memory pressure sufficient to allow us to continue, zap the entire
aperture. That should give the system long enough to recover and reap
some pages from the evicted objects, forestalling the allocation error
for the new object.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-11 22:55:48 +00:00
Chris Wilson
092de6f225 drm/i915/evict: Ensure we completely cleanup on failure
... and not leave the objects in a inconsistent state.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
2011-01-11 22:55:39 +00:00
Chris Wilson
36cf174230 drm/i915/execbuffer: Correctly clear the current object list upon EFAULT
Before releasing the lock in order to copy the relocation list from user
pages, we need to drop all the object references as another thread may
usurp and execute another batchbuffer before we reacquire the lock.
However, the code was buggy and failed to clear the list...

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
2011-01-11 22:55:29 +00:00
Chris Wilson
08c1832354 drm/i915/debugfs: Show all objects in the gtt
Useful for determining the layout.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-11 22:16:56 +00:00
Chris Wilson
a779e5abda drm/i915: Record AGP memory type upon error
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-11 22:16:56 +00:00
Chris Wilson
0a58705b2f drm/i915: Periodically flush the active lists and requests
In order to retire active buffers whilst no client is active, we need to
insert our own flush requests onto the ring.

This is useful for servers that queue up some rendering and then go to
sleep as it allows us to the complete processing of those requests,
potentially making that memory available again much earlier.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-11 22:15:30 +00:00
Breno Leitao
f76957fc8f ehea: Increase the skb array usage
Currently the skb array is not fully allocated, and the allocation
is done as it's requested, which is not the expected way.

This patch just allocate the full skb array at driver initialization.
Also, this patch increases ehea version to 107.

Signed-off-by: Breno Leitao <leitao@linux.vnet.ibm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2011-01-11 14:03:09 -08:00
Shawn Guo
b5074087ad net/fec: remove config FEC2 as it's used nowhere
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2011-01-11 14:03:08 -08:00
Ken Kawasaki
0c302f57ab pcnet_cs: add new_id
pcnet_cs:
     add another ID of "corega Ether CF-TD" 10Base-T PCMCIA card.

Signed-off-by: Ken Kawasaki <ken_kawasaki@spring.nifty.jp>
Signed-off-by: David S. Miller <davem@davemloft.net>
2011-01-11 14:03:08 -08:00
Chris Wilson
d912640058 drm/i915/gtt: Unmap the PCI pages after unbinding them from the GTT
Dave Airlie spotted that his ILK laptop with DMAR enabled was generating
the occasional DMAR warning.

"The ordering in the previous code was to rewrite the GTT table before
unmapping the pages and that makes sense to me."

This is his stable patch ported to d-i-n.

Reported-by: Dave Airlie <airlied@redhat.com>
Original-patch-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-11 20:44:56 +00:00
Chris Wilson
bcfb2e2858 drm/i915: Record the error batchbuffer on each ring
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-11 20:44:55 +00:00
Chris Wilson
db66e37d23 drm/i915: Include TLB miss overhead for computing WM
The docs recommend that if 8 display lines fit inside the FIFO buffer,
then the number of watermark entries should be increased to hide the
latency of filling the rest of the FIFO buffer.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-11 20:44:54 +00:00
Chris Wilson
882417851a drm/i915: Propagate error from flushing the ring
... in order to avoid a BUG() and potential unbounded waits.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-11 20:44:50 +00:00
Jesse Barnes
776ad8062b drm/i915: detect & report PCH display error interrupts
FDI and the transcoders can fail for various reasons, so detect those
conditions and report on them.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-11 20:44:01 +00:00
Jesse Barnes
d5bb081b02 drm/i915: cleanup rc6 code
Cleanup several aspects of the rc6 code:
  - misnamed intel_disable_clock_gating function (was only about rc6)
  - remove commented call to intel_disable_clock_gating
  - rc6 enabling code belongs in its own function (allows us to move the
    actual clock gating enable call back into restore_state)
  - allocate power & render contexts up front, only free on unload
    (avoids ugly lazy init at rc6 enable time)

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
[ickle: checkpatch cleanup]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-11 20:43:59 +00:00
Jesse Barnes
1daed3fb83 drm/i915: fix rc6 enabling around suspend/resume
Enabling RC6 implies setting a graphics context.  Make sure we do that
only after the ring has been enabled, otherwise our ring commands will
hang.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-11 20:43:59 +00:00
Jesse Barnes
88271da3f3 drm/i915: re-enable rc6 support for Ironlake+
Re-enable rc6 support on Ironlake for power savings.  Adds a debugfs
file to check current RC state, adds a missing workaround for Ironlake
MI_SET_CONTEXT instructions, and renames MCHBAR_RENDER_STANDBY to
RSTDBYCTL to match the docs.

Keep RC6 and the power context disabled on pre-ILK.  It only seems to
hang and doesn't save any power.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-11 20:43:58 +00:00
Chris Wilson
0dc79fb2a3 drm/i915: Make the ring IMR handling private
As the IMR for the USER interrupts are not modified elsewhere, we can
separate the spinlock used for these from that of hpd and pipestats.
Those two IMR are manipulated under an IRQ and so need heavier locking.

Reported-and-tested-by: Alexey Fisher <bug-track@fisher-privat.net>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-11 20:43:58 +00:00
Chris Wilson
01a03331e5 drm/i915/ringbuffer: Simplify the ring irq refcounting
... and move it under the spinlock to gain the appropriate memory
barriers.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=32752
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-11 20:43:57 +00:00
Chris Wilson
9862e600ce drm/i915/debugfs: Show the per-ring IMR
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-11 20:43:56 +00:00
Chris Wilson
0f46832fab drm/i915: Mask USER interrupts on gen6 (until required)
Otherwise we may consume 20% of the CPU just handling IRQs whilst
rendering. Ouch.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-11 20:43:56 +00:00
Chris Wilson
b72f3acb71 drm/i915: Handle ringbuffer stalls when flushing
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-11 20:43:55 +00:00
Chris Wilson
63256ec534 drm/i915: Enforce write ordering through the GTT
We need to ensure that writes through the GTT land before any
modification to the MMIO registers and so must impose a mandatory write
barrier when flushing the GTT domain. This was revealed by relaxing the
write ordering by experimentally mapping the registers and the GATT as
write-combining.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-11 20:42:53 +00:00
Chris Wilson
759010728b drm/i915: Remove impossible test
As has_gem is unconditionally set to true, the conditional immediately
following that assignment is superfluous.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-11 20:37:06 +00:00
Jesse Barnes
dbdc647927 drm/i915: avoid reading non-existent PLL reg on Ironlake+
These functions need to be reworked for Ironlake and above, but until
then at least avoid reading non-existent registers.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
[ickle: combine with a gratuitous tidy]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-11 20:37:05 +00:00
Chris Wilson
d78cb50baa drm/i915: add 'reset' parameter
When bringing up new hardware, or otherwise experimenting, GPU hangs are
a way of life. However, the automatic GPU reset can do more harm than
good under these circumstances, as we may wish to capture a full trace for
debugging.

Based on a patch by Zhenyu Wang.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-11 20:36:15 +00:00
Yuanhan Liu
a0fa62d3b6 drm/i915: fix the wrong latency value while computing wm0
On Ironlake, the LP0 latency is hardcoded and in ns unit, while on
Sandybridge, it comes from a register and with unit 0.1 us. So, fix
the wrong latency value while computing wm0 on Ironlake and Sandybridge.

Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-11 20:36:15 +00:00
Jesse Barnes
b79d499022 drm/i915: support low power watermarks on Ironlake
This patch actually makes the watermark code even uglier (if that's
possible), but has the advantage of sharing code between SNB and ILK at
least.  Longer term we should refactor the watermark stuff into its own
file and clean it up now that we know how it's supposed to work.

Supporting WM2 on my Vaio reduced power consumption by around 0.5W, so
this patch is definitely worthwhile (though it also needs lots of test
coverage).

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
[ickle: pass the watermark structs arounds]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-11 20:36:14 +00:00
Chris Wilson
c97689d886 agp/intel: Flush the chipset write buffers when changing GTT base
Flush the chipset write buffers before and after adjusting the GTT base
register, just in case. We only modify this value upon initialisation
(boot and resume) so there should be no outstanding writes, however
there are always those persistent PGTBL_ER that keep getting reported
upon resume.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-11 20:35:41 +00:00
Chris Wilson
55249baaa5 drm/i915: Workaround erratum on i830 for TAIL pointer within last 2 cachelines
On i830 if the tail pointer is set to within 2 cachelines of the end of
the buffer, the chip may hang. So instead if the tail were to land in
that location, we pad the end of the buffer with NOPs, and start again
at the beginning.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-11 20:35:41 +00:00
Chris Wilson
35c3047ad1 drm/i915: Use the mappable sizes determined by GTT for consistency.
There should be no difference, but we can eliminate redundant code.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-11 20:35:40 +00:00
Jesse Barnes
a6044e23b7 drm/i915: support overclocking on Sandy Bridge
In some configuration, the PCU may allow us to overclock the GPU.
Check for this case and adjust the max frequency as appropriate.  Also
initialize the min/max frequencies to default values as indicated by
hardware.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-11 20:35:40 +00:00
Chris Wilson
bee17e5ae6 drm/i915/lvds: Always use 0 to disable the pfit controller
... and just any combination of bits & ~PFIT_ENABLE. This way we do not
attempt disable to the panel fitter controller uselessly upon
intel_lvds_disable().

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-11 20:27:11 +00:00
Chris Wilson
47356eb672 drm/i915/panel: Only record the backlight level when it is enabled
By tracking the current status of the backlight we can prevent recording
the value of the current backlight when we have disabled it. And so
prevent restoring it to 'off' after an unbalanced sequence of
intel_lvds_disable/enable.

Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=22672
Tested-by: Alex Riesen <raa.lkml@gmail.com>
Tested-by: Larry Finger <Larry.Finger@lwfinger.net>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
2011-01-11 20:27:04 +00:00
Chris Wilson
97aaf91073 drm/i915/sdvo: Defer detection of output capabilities until probing
Alex Fiestas reported an issue with his HDMI connector being misdetected
as DVI unless he had something connected upon boot. By moving the
decision as to whether to use HDMI or DVI encoding for the HDMI capable
output until we probe the monitor means that we should avoid sending a
HDMI signal to a DVI monitor and also correctly detect hardware like
Alex's.

However, to really determine what connector is soldered onto the wire we
need to inspect the VBT sdvo child devices - but can we trust it?

Reported-by: Alex Fiestas <alex@eyeos.org>
Tested-by: Alex Fiestas <alex@eyeos.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=32828
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
2011-01-11 20:26:55 +00:00
Yuanhan Liu
3c5a62b522 drm/i915: fix calculation of eDP signal levels on Sandybridge
Some voltage swing/pre-emphasis level use the same value on eDP
Sandybridge, like 400mv_0db and 600mv_0db are with the same value
of (0x0 << 22). So, fix them, and point out the value if it isn't
a supported voltage swing/pre-emphasis level.

Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
2011-01-11 20:26:54 +00:00
David Müller
f5afcd3dd0 drm/i915/crt: Check for a analog monitor in case of DVI-I
Since Linux 2.6.36 the digital output on my system (855GME + DVI-I) is
not working any longer. The analog output is always activated
regardless of the type of monitor attached.

The culprit seems to be intel_crt_detect_ddc(), which returns true as
soon as an ACK from the EDID device is received. Obviously this
approach does not work with DVI-I where the analog and digital outputs
share a common DDC bus.

In a similar manner to the shared DDC wire, ala the "Mac Mini Hack", we
need an additional check to make sure that there really is an analog
device attached to the DDC.

Signed-off-by: David Müller <d.mueller@elsoft.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
2011-01-11 20:26:33 +00:00
Jesse Barnes
37f8097558 drm/i915: make DP training try a little harder
When trying to do channel equalization, we need to make sure we still
have clock recovery on all lanes while training.  We also need to try
clock recovery again if we lose the clock or if channel eq fails 5
times.  We'll try clock recovery up to 5 more times before giving up
entirely.

Gets suspend/resume working on my Vaio again and brings us back into
compliance with the DP training sequence spec.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-11 20:22:23 +00:00
Jesse Barnes
858bc21f06 drm/i915: check eDP encoder correctly when setting modes
We were using a stale pointer in the check which caused us to use CPU
attached DP params when we should have been using PCH attached params.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31988
Tested-by: Jan-Hendrik Zab <jan@jhz.name>
Tested-by: Christoph Lukas <christoph.lukas@gmx.net>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
2011-01-11 20:21:55 +00:00