Commit Graph

1 Commits

Author SHA1 Message Date
Pi-Cheng Chen
c9c96ae2c5 dt-bindings: mediatek: Add MT8173 CPU DVFS clock bindings
This patch adds the clock and regulator consumer properties part of
document for CPU DVFS clocks on Mediatek MT8173 SoC.

Signed-off-by: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
Acked-by: Michael Turquette <mturquette@baylibre.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-09-01 15:50:11 +02:00