Commit Graph

103 Commits

Author SHA1 Message Date
Geert Uytterhoeven
2eced4607a soc: renesas: Enable ARM_ERRATA_754322 for affected Cortex-A9
ARM Erratum 754322 affects Cortex-A9 revisions r2p* and r3p*.

Automatically enable support code to mitigate the erratum when compiling
a kernel for any of the affected Renesas SoCs:
  - RZ/A1: r3p0,
  - R-Mobile A1: r2p4,
  - R-Car M1A: r2p2-00rel0,
  - R-Car H1: r3p0,
  - SH-Mobile AG5: r2p2.

EMMA Mobile EV2 (r1p3) and RZ/A2 (r4p1) are not affected.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
2019-08-23 10:33:31 +02:00
Geert Uytterhoeven
435dce2da2 soc: renesas: Enable ARM_ERRATA_814220 for affected Cortex-A7
ARM Erratum 814220 affects Cortex-A7 revisions r0p2-r0p5.

Automatically enable support code to mitigate the erratum when compiling
a kernel for any of the affected Renesas SoCs:
  - R-Mobile APE6: r0p2,
  - RZ/G1E: r0p5,
  - RZ/G1C: r0p5,
  - R-Car H2: r0p3,
  - R-Car E2: r0p5,
  - RZ/N1: r0p5.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
2019-08-23 10:33:31 +02:00
Geert Uytterhoeven
af0bc63472 soc: renesas: rmobile-sysc: Set GENPD_FLAG_ALWAYS_ON for always-on domain
Currently the R-Mobile "always-on" PM Domain is implemented by returning
-EBUSY from the generic_pm_domain.power_off() callback, and doing
nothing in the generic_pm_domain.power_on() callback.  However, this
means the PM Domain core code is not aware of the semantics of this
special domain, leading to boot warnings like the following on
SH/R-Mobile SoCs:

    sh_cmt e6130000.timer: PM domain c5 will not be powered off

Fix this by making the always-on nature of the domain explicit instead,
by setting the GENPD_FLAG_ALWAYS_ON flag.  This removes the need for the
domain to provide power control callbacks.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
2019-08-23 09:58:01 +02:00
Geert Uytterhoeven
e0e1df6152 soc: renesas: rcar-sysc: Eliminate local variable gov
As of commit 980532a5dd ("soc: renesas: rcar-sysc: Use
GENPD_FLAG_ALWAYS_ON"), the local variable "gov" is assigned just once,
so it can be eliminated.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
2019-08-19 14:56:14 +02:00
Nishka Dasgupta
da51ceda8a soc: renesas: rcar-sysc: Add goto to of_node_put() before return
The local variable np in function rcar_sysc_pd_init takes the return
value of of_find_matching_node_and_match(), which gets a node but does
not put it.  If np is not put before the function returns, it may cause
a memory leak.

Hence, remove the return statement that does not immediately follow a
putting of np.  Replace it with a goto pointing to a pre-existing label
that first puts np and then returns the required value.

Issue found with Coccinelle.

Fixes: afa6f53df6 ("soc: renesas: rcar-sysc: Add support for fixing up power area tables")
Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-08-19 14:56:14 +02:00
Geert Uytterhoeven
0ed0eb0171 soc: renesas: rcar-sysc: Use [] to denote a flexible array member
Flexible array members should be denoted using [] instead of [0], else
gcc will not warn when they are no longer at the end of the structure.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
2019-07-29 15:36:56 +02:00
Geert Uytterhoeven
02af9f9094 soc: renesas: Enable RZ/A1 IRQC on RZ/A1H and RZ/A2M
Auto-enable support for the RZ/A1 Interrupt Controller when configuring
a kernel which supports RZ/A1H or RZ/A2M SoCs.
Keep selects sorted while at it.

This is similar to how interrupt controllers for other Renesas SoCs are
enabled.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-06-06 10:37:06 +02:00
Takeshi Kihara
15160f6de0 soc: renesas: Identify R-Car M3-W ES1.3
The Product Register of R-Car M3-W ES1.3 incorrectly identifies the SoC
revision as ES2.1. Add a workaround to fix this.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-03-18 10:33:42 +01:00
Biju Das
a64597227d soc: renesas: r8a774c0-sysc: Fix initialization order of 3DG-{A,B}
The workaround for the wrong hierarchy of the 3DG-{A,B} power domains on
RZ/G2E ES1.0 corrected the parent domains. However, the 3DG-{A,B} power
domains were still initialized and powered in the wrong order, causing
3DG operation to fail.

Fix this by changing the order in the table at runtime, when running on
an affected SoC.

This work is based on the work done by Geert for R-Car E3.

Fixes: f37d211c68 ("soc: renesas: rcar-sysc: Add r8a774c0 support")

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-07 14:51:51 +01:00
Arnd Bergmann
8070ba6348 ARM: shmobile: fix build regressions
A number of Kconfig options have become available now to random ARM
platforms outside of ARCH_MULTIPLATFORM, which now causes Kconfig
warnings, and other build errors when those select options that
lack additional dependencies, e.g.:

WARNING: unmet direct dependencies detected for HAVE_ARM_ARCH_TIMER
  Depends on [n]: CPU_V7 [=n]
  Selected by [y]:
  - ARCH_RCAR_GEN2 [=y] && SOC_RENESAS [=y]
  - ARCH_R8A73A4 [=y] && SOC_RENESAS [=y] && ARM [=y]

WARNING: unmet direct dependencies detected for SYS_SUPPORTS_EM_STI
  Depends on [n]: GENERIC_CLOCKEVENTS [=n]
  Selected by [y]:
  - ARCH_EMEV2 [=y] && SOC_RENESAS [=y] && ARM [=y]

Put the old dependency on ARCH_RENESAS back for the moment to restore
the previous behavior.

Fixes: 062887bf5e ("ARM: shmobile: Move SoC Kconfig symbols to drivers/soc/renesas/")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-07 13:31:05 +01:00
Linus Torvalds
d36377c6eb ARM: SoC driver updates
Misc driver updates for platforms, many of them power related.
 
  - Rockchip adds power domain support for rk3066 and rk3188
  - Amlogic adds a power measurement driver
  - Allwinner adds SRAM support for three platforms (F1C100, H5, A64 C1)
  - Wakeup and ti-sysc (platform bus) fixes for OMAP/DRA7
  - Broadcom fixes suspend/resume with Thumb2 kernels, and improves
    stability of a handful of firmware/platform interfaces
  - PXA completes their conversion to dmaengine framework
  - Renesas does a bunch of PM cleanups across many platforms
  - Tegra adds support for suspend/resume on T186/T194, which includes
    some driver cleanups and addition of wake events
  - Tegra also adds a driver for memory controller (EMC) on Tegra2
  - i.MX tweaks power domain bindings, and adds support for i.MX8MQ in GPC
  - Atmel adds identifiers and LPDDR2 support for a new SoC, SAM9X60
 
  + misc cleanups across several platforms
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Olof Johansson:
 "Misc driver updates for platforms, many of them power related.

   - Rockchip adds power domain support for rk3066 and rk3188

   - Amlogic adds a power measurement driver

   - Allwinner adds SRAM support for three platforms (F1C100, H5, A64
     C1)

   - Wakeup and ti-sysc (platform bus) fixes for OMAP/DRA7

   - Broadcom fixes suspend/resume with Thumb2 kernels, and improves
     stability of a handful of firmware/platform interfaces

   - PXA completes their conversion to dmaengine framework

   - Renesas does a bunch of PM cleanups across many platforms

   - Tegra adds support for suspend/resume on T186/T194, which includes
     some driver cleanups and addition of wake events

   - Tegra also adds a driver for memory controller (EMC) on Tegra2

   - i.MX tweaks power domain bindings, and adds support for i.MX8MQ in
     GPC

   - Atmel adds identifiers and LPDDR2 support for a new SoC, SAM9X60

  and misc cleanups across several platforms"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (73 commits)
  ARM: at91: add support in soc driver for new SAM9X60
  ARM: at91: add support in soc driver for LPDDR2 SiP
  memory: omap-gpmc: Use of_node_name_eq for node name comparisons
  bus: ti-sysc: Check for no-reset and no-idle flags at the child level
  ARM: OMAP2+: Check also the first dts child for hwmod flags
  soc: amlogic: meson-clk-measure: Add missing REGMAP_MMIO dependency
  soc: imx: gpc: Increase GPC_CLK_MAX to 7
  soc: renesas: rcar-sysc: Fix power domain control after system resume
  soc: renesas: rcar-sysc: Merge PM Domain registration and linking
  soc: renesas: rcar-sysc: Remove rcar_sysc_power_{down,up}() helpers
  soc: renesas: r8a77990-sysc: Fix initialization order of 3DG-{A,B}
  dt-bindings: sram: sunxi: Add compatible for the A64 SRAM C1
  dt-bindings: sram: sunxi: Add bindings for the H5 with SRAM C1
  dt-bindings: sram: Add Allwinner suniv F1C100s
  soc: sunxi: sram: Add support for the H5 SoC system control
  soc: sunxi: sram: Enable EMAC clock access for H3 variant
  soc: imx: gpcv2: add support for i.MX8MQ SoC
  soc: imx: gpcv2: move register access table to domain data
  soc: imx: gpcv2: prefix i.MX7 specific defines
  dmaengine: pxa: make the filter function internal
  ...
2018-12-31 17:32:35 -08:00
Geert Uytterhoeven
7fc4650cc2 soc: renesas: rcar-sysc: Fix power domain control after system resume
To control power to a power domain, the System Controller (SYSC) needs
the corresponding interrupt source to be enabled, but masked, to prevent
the CPU from receiving it.

Currently this is handled in the driver's probe() routine, and set up
for every domain present, even if it will not be controlled directly by
SYSC (CPU domains are powered through the APMU on R-Car Gen2 and later).

On R-Car Gen3, PSCI powers down the SoC during system suspend, thus
losing any configured interrupt state.  Hence after system resume, power
domains not controlled through the APMU (e.g. A3IR, A3VC, A3VP) fail to
power up.

Fix this by replacing the global interrupt setup in the probe() routine
by a domain-specific interrupt setup in rcar_sysc_power(), where the
domain's power is actually controlled.  This brings the code more in
line with the flowchart in the Hardware User's Manual.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-12-06 12:10:10 -08:00
Geert Uytterhoeven
1585124d95 soc: renesas: rcar-sysc: Merge PM Domain registration and linking
Commit 977d5ba450 ("soc: renesas: rcar-sysc: Make PM domain
initialization more robust") split PM Domain registration and the
linking of children to their parents, to accommodate PM Domain tables
that list child domains before their parents.

However, this failed to realize that parent power domains must be
powered up before their children anyway, and that this thus must be
reflected by the order in the PM Domain tables.

Revert the split, as it did not help anyway.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-12-06 12:10:09 -08:00
Geert Uytterhoeven
319c840906 soc: renesas: rcar-sysc: Remove rcar_sysc_power_{down,up}() helpers
Until commit 7e8a50df26 ("soc: renesas: rcar-sysc: Drop legacy
handling"), the rcar_sysc_power_{down,up}() helpers were public, as they
were called by the legacy (pre-DT) CPU power management code on R-Car H1
and R-Car Gen2 before.

As they are just one-line wrappers around rcar_sysc_power(), it makes
sense to just remove them.

This also avoids a bool/helper/bool conversion in rcar_sysc_power_cpu(),
where a bool is checked to call one of two helper functions, which
just call rcar_sysc_power() with hardcoded boolean values again.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-12-06 12:10:09 -08:00
Geert Uytterhoeven
b0d7fbf8b1 soc: renesas: r8a77990-sysc: Fix initialization order of 3DG-{A,B}
The workaround for the wrong hierarchy of the 3DG-{A,B} power
domains on R-Car E3 ES1.0 corrected the parent domains.
However, the 3DG-{A,B} power domains were still initialized and powered
in the wrong order, causing 3DG operation to fail.

Fix this by changing the order in the table at runtime, when running on
an affected SoC.

Fixes: 086b399965 ("soc: renesas: r8a77990-sysc: Add workaround for 3DG-{A,B}")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-12-06 12:10:08 -08:00
Geert Uytterhoeven
2ed29e15e4 ARM: shmobile: R-Mobile: Move pm-rmobile to drivers/soc/renesas/
The pm-rmobile driver is really a driver for the System Controller
(SYSC) found in R-Mobile SoCs.  An equivalent driver for R-Car SoCs is
already located under drivers/soc/renesas/.

Hence move the pm-rmobile driver from arch/arm/mach-shmobile/ to
drivers/soc/renesas/, and rename it to rmobile-sysc.

Enable compile-testing on non-ARM and non-R-Mobile SoCs.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-30 11:29:11 +01:00
Geert Uytterhoeven
160bfa7c72 soc: renesas: r8a77980-sysc: Correct A3VIP[012] power domain hierarchy
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
renamed the A3VIP power domain on R-Car V3H to A3VIP0, and clarified the
power domain hierarchy for the A3VIP[012] power domains.

As the definition for the A3VIP0 domain is not yet used from DT, it can
just be renamed.

Fixes: 7755b40d07 ("dt-bindings: power: add R8A77980 SYSC power domain definitions")
Fixes: 41d6d8bd8a ("soc: renesas: rcar-sysc: add R8A77980 support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-30 11:22:30 +01:00
Geert Uytterhoeven
97473bc85b soc: renesas: r8a77980-sysc: Correct names of A2DP[01] power domains
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
renamed the A2PD0 and A2DP0 power domains on R-Car V3H to A2DP0 resp.
A2DP1.

As these definitions are not yet used from DT, they can just be renamed.

Fixes: 7755b40d07 ("dt-bindings: power: add R8A77980 SYSC power domain definitions")
Fixes: 41d6d8bd8a ("soc: renesas: rcar-sysc: add R8A77980 support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-30 11:22:30 +01:00
Geert Uytterhoeven
b5eb730e03 soc: renesas: r8a77970-sysc: Correct names of A2DP/A2CN power domains
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
renamed the A2IR2 and A2IR3 power domains on R-Car V3M to A2DP resp.
A2CN.

As these definitions are not yet used from DT, they can just be renamed.

While at it, fix the indentation of the A3IR definition.

Fixes: 833bdb47c8 ("dt-bindings: power: add R8A77970 SYSC power domain definitions")
Fixes: bab9b2a74f ("soc: renesas: rcar-sysc: add R8A77970 support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-30 11:22:30 +01:00
Geert Uytterhoeven
da3e1c57ca soc: renesas: r8a77970-sysc: Remove non-existent CR7 power domain
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
removed the CR7 power domain on R-Car V3M, as this SoC does not have an
ARM Cortex-R7 Realtime Core.

As this definition was never used from DT, it can just be removed.

Fixes: 833bdb47c8 ("dt-bindings: power: add R8A77970 SYSC power domain definitions")
Fixes: bab9b2a74f ("soc: renesas: rcar-sysc: add R8A77970 support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-30 11:22:29 +01:00
Geert Uytterhoeven
a93913cecb soc: renesas: r8a77965-sysc: Remove non-existent A3IR power domain
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
removed the A3IR power domain on R-Car M3-N, as this SoC does not have
an Image Processing Unit (IMP-X5).

The definition in the DT bindings header cannot be removed yet, until
its (incorrect) user has been removed.

Fixes: a527709b78 ("soc: renesas: rcar-sysc: Add R-Car M3-N support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-30 11:22:29 +01:00
Geert Uytterhoeven
062887bf5e ARM: shmobile: Move SoC Kconfig symbols to drivers/soc/renesas/
For consistency with arm64, where vendors have a single Kconfig symbol
in arch/arm64/Kconfig.platforms.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-16 07:27:19 -08:00
Geert Uytterhoeven
fa43948f67 arm64: renesas: Move SoC Kconfig symbols to drivers/soc/renesas/
arch/arm64/Kconfig.platforms has SoC-specific Kconfig symbols for
Renesas SoCs, while other vendors have only a single Kconfig symbol.

Increase consistency with other vendors by moving the SoC-specific
Kconfig symbols to drivers/soc/renesas/Kconfig.

Increase consistency with R-Car Gen1 and Gen2 SoCs on arm32 by
introducing a family-specific Kconfig symbol for R-Car Gen3
(ARCH_RCAR_GEN3), which enables family-specific hardware features.
While so far only a single family (R-Car Gen3 and derivatives) of
Renesas arm64 SoCs is supported by Linux, this will make it easier
to add support for other SoC families later.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-16 07:27:19 -08:00
Biju Das
547276c679 soc: renesas: rcar-rst: Add support for RZ/G1N
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-17 10:46:31 +02:00
Biju Das
c3299eb277 soc: renesas: rcar-sysc: Add r8a7744 support
Add support for RZ/G1N (R8A7744) SoC power areas to the R-Car SYSC driver.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-17 10:33:33 +02:00
Fabrizio Castro
91e95ecd4b soc: renesas: rcar-rst: Add support for RZ/G2E
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-17 10:29:13 +02:00
Fabrizio Castro
f37d211c68 soc: renesas: rcar-sysc: Add r8a774c0 support
Add support for the RZ/G2E (R8A774C0) SoC power areas to the
R-Car SYSC driver.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-14 15:33:35 +02:00
Fabrizio Castro
2bab3d8012 soc: renesas: Identify RZ/G2E
Add support for identifying the RZ/G2E (r8a774c0) SoC.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-12 10:19:52 +02:00
Kuninori Morimoto
41c4567ce2 soc: renesas: convert to SPDX identifiers
This patch updates license to use SPDX-License-Identifier
instead of verbose license text.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-12 10:19:51 +02:00
Biju Das
3116d859e7 soc: renesas: rcar-rst: Add support for RZ/G2M
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-12 10:19:51 +02:00
Biju Das
7f0e99cc91 soc: renesas: rcar-sysc: Add r8a774a1 support
Add support for RZ/G2M (R8A774A1) SoC power areas to the R-Car SYSC
driver.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-12 10:19:06 +02:00
Chris Brandt
175f435f44 soc: renesas: identify RZ/A2
Add support for identifying the RZ/A2M (R7S9210) SoC.
Also add support for reading the BSID register which is a different format
than the PRR.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-08-27 15:06:42 +02:00
Biju Das
2a4056a759 soc: renesas: Identify RZ/G2M
This patch adds support for identifying the RZ/G2M (r8a774a1) SoC.
It corrects the original RZ/G SoC family name to RZ/G1 and also
adds support for the new RZ/G2 SoC family.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-08-27 15:06:41 +02:00
Olof Johansson
b598b3aaf9 Second Round of Renesas ARM Based SoC Updates for v4.19
* Always enable ARCH_TIMER on SoCs with A7 or A15
 
   All such SoCs have ARCH_TIMER so there is no need for it to be optional.
   This allows clean-up which is included in this change.
 
 * Do not compile r8a7779_platform_cpu_kill when it is unused
 
   This avoids a warning by shuffling code into an existing #ifdef
   r8a7779 is the R-Car H1 SoC
 
 * Add SMP enabler driver for the RZ/N1D (r9a06g032) SoC
 
   This is to allow SMP to be enabled via DT on the r9a06g032
 
 * Stop compiling headsmp-apmu for non-SMP configs
 
   This is a minor clean-up allowing removal of an #ifdef
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Merge tag 'renesas-arm-soc2-for-v4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc

Second Round of Renesas ARM Based SoC Updates for v4.19

* Always enable ARCH_TIMER on SoCs with A7 or A15

  All such SoCs have ARCH_TIMER so there is no need for it to be optional.
  This allows clean-up which is included in this change.

* Do not compile r8a7779_platform_cpu_kill when it is unused

  This avoids a warning by shuffling code into an existing #ifdef
  r8a7779 is the R-Car H1 SoC

* Add SMP enabler driver for the RZ/N1D (r9a06g032) SoC

  This is to allow SMP to be enabled via DT on the r9a06g032

* Stop compiling headsmp-apmu for non-SMP configs

  This is a minor clean-up allowing removal of an #ifdef

* tag 'renesas-arm-soc2-for-v4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15
  ARM: shmobile: r8a7779: hide unused r8a7779_platform_cpu_kill
  soc: r9a06g032: don't build SMP files for non-SMP config
  ARM: shmobile: Add the R9A06G032 SMP enabler driver
  ARM: shmobile: rcar-gen2: Stop compiling headsmp-apmu on !SMP

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-07-21 14:19:37 -07:00
Arnd Bergmann
c83e9c4873 soc: r9a06g032: don't build SMP files for non-SMP config
Without CONFIG_SMP, we get a build failure:

In file included from include/linux/byteorder/little_endian.h:5,
                 from arch/arm/include/uapi/asm/byteorder.h:22,
                 from include/asm-generic/bitops/le.h:6,
                 from arch/arm/include/asm/bitops.h:342,
                 from include/linux/bitops.h:18,
                 from include/linux/kernel.h:11,
                 from include/asm-generic/bug.h:18,
                 from arch/arm/include/asm/bug.h:60,
                 from include/linux/bug.h:5,
                 from include/linux/io.h:23,
                 from drivers/soc/renesas/r9a06g032-smp.c:11:
drivers/soc/renesas/r9a06g032-smp.c: In function 'r9a06g032_smp_boot_secondary':
drivers/soc/renesas/r9a06g032-smp.c:43:21: error: 'secondary_startup' undeclared (first use in this function)
  writel(__pa_symbol(secondary_startup), cpu_bootaddr);
                     ^~~~~~~~~~~~~~~~~

This makes the compilation of that file conditional on SMP support.
It would probably be better for consistency to leave that file
in arch/arm/mach-shmobile/, matching what we do for all other smp
operations.

Fixes: cde4f86f9249 ("arm: shmobile: Add the R9A06G032 SMP enabler driver")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-07-20 13:44:09 +02:00
Michel Pollet
7416d44113 ARM: shmobile: Add the R9A06G032 SMP enabler driver
The Renesas R9A06G032 second CA7 is parked in a ROM pen at boot time, it
equires a special enable method to get it started.

Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-07-20 13:44:04 +02:00
Olof Johansson
a67de88209 Renesas ARM Based SoC Arm SoC Updates for v4.19
* Convert to SPDX identifier
 
 * Remove legacy SMP fallback code
 
   Geert Uytterhoeven says "R-Car H2 and M2-W have been supporting SMP
   enablement from DT using the "renesas,apmu" enable-method since v4.8.
   A legacy fallback was left in place for backwards compatibility with old
   DTBs.
 
   This patch series removes the legacy SMP fallbacks for R-Car H2 and
   M2-W, and consolidates their support in the common R-Car Gen2 machine
   definition.2
 
 * APMU cleanups after legacy SMP fallback removal
   - Move cpu_leave_lowpower() from HOTPLUG_CPU || SUSPEND section to the
     SUSPEND section as it is only used for suspend
   - Remove shmobile_smp_apmu_prepare_cpus() as it is no longer used
   - Remove platsmp-apmu.h
 
 * Drop legacy SYSC fallbacks
 
   Geert Uytterhoeven says "When DT SYSC support was introduced in v4.7,
   legacy fallbacks were kept to keep secondary CPUs working on R-Car H1,
   H2, and M2-W using old DTBs.  However, the time has come to drop these
   fallbacks, and clean up the resulting code"
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Merge tag 'renesas-arm-soc-for-v4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc

Renesas ARM Based SoC Arm SoC Updates for v4.19

* Convert to SPDX identifier

* Remove legacy SMP fallback code for R-CAR H2 and M2-W
  - DT enablement has been in since 4.8, no longer needed

* APMU cleanups after legacy SMP fallback removal

* Drop legacy SYSC fallback code for R-Car H1, H2 and M2-W
  - DT enablement has been in since 4.7, no longer needed.

* tag 'renesas-arm-soc-for-v4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: convert to SPDX identifier
  soc: renesas: rcar-sysc: Drop legacy handling
  ARM: shmobile: r8a7779: Remove explicit SYSC config and init
  ARM: shmobile: r8a7779: Use rcar_sysc_power_{down,up}_cpu()
  soc: renesas: rcar-sysc: Provide helpers to power up/down CPUs
  ARM: shmobile: r8a7779: Stop powering down secondary CPUs during early boot
  ARM: shmobile: rcar-gen2: Remove explicit SYSC config and init
  ARM: shmobile: apmu: Remove platsmp-apmu.h
  ARM: shmobile: apmu: Remove obsolete shmobile_smp_apmu_prepare_cpus()
  ARM: shmobile: apmu: Move cpu_leave_lowpower() to SUSPEND section
  ARM: shmobile: Remove unused shmobile_smp_init_fallback_ops()
  ARM: shmobile: r8a7791: Use common R-Car Gen2 machine definition
  ARM: shmobile: r8a7791: Remove legacy SMP fallback code
  ARM: shmobile: r8a7790: Use common R-Car Gen2 machine definition
  ARM: shmobile: r8a7790: Remove legacy SMP fallback code

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-07-02 10:10:43 -07:00
Geert Uytterhoeven
7e8a50df26 soc: renesas: rcar-sysc: Drop legacy handling
Now the R-Car platform code no longer supports DTBs lacking a SYSC
device node in DT, all legacy handling can be dropped from the R-Car
SYSC driver:
  - Make rcar_sysc_ch private to the driver,
  - Make rcar_sysc_power_{down,up}() static (they have been replaced by
    rcar_sysc_power_{down,up}_cpu()),
  - Remove the legacy wrapper rcar_sysc_init(), and the check for double
    initialization (only the early_initcall is left).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-06-18 12:00:29 +02:00
Geert Uytterhoeven
f2b1d2f94a soc: renesas: rcar-sysc: Provide helpers to power up/down CPUs
Provide helpers to control CPU power areas from platform code, taking
just a CPU index.  This will avoid having to pass full CPU power area
parameter blocks, and thus duplicating information already provided by
SoC-specific SYSC drivers.

This will be used on R-Car H1 only.
Later R-Car generations rely on APMU/RST for CPU power area control.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-06-18 12:00:28 +02:00
Geert Uytterhoeven
977d5ba450 soc: renesas: rcar-sysc: Make PM domain initialization more robust
The quirk for R-Car E3 ES1.0 added in commit 086b399965 ("soc:
renesas: r8a77990-sysc: Add workaround for 3DG-{A,B}") makes the 3DG-A
PM domain a subdomain of the 3DG-B PM domain.  However, registering
3DG-A with its parent fails silently, as the 3DG-B PM domain hasn't been
registered yet, and such failures are never reported.

Fix this by:
  1. Splitting PM Domain initialization in two steps, so all PM domains
     are registered before any child-parent links are established,
  2. Reporting any failures in establishing child-parent relations.

Check for and report pm_genpd_init() failures, too, as that function
gained a return value in commit 7eb231c337 ("PM / Domains: Convert
pm_genpd_init() to return an error code").

Fixes: 086b399965 ("soc: renesas: r8a77990-sysc: Add workaround for 3DG-{A,B}")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-06-08 10:04:25 +02:00
Yoshihiro Shimoda
086b399965 soc: renesas: r8a77990-sysc: Add workaround for 3DG-{A,B}
This patch adds workaround for 3DG-{A,B} of R-Car E3 ES1.0 because
the SoC has a restriction about the order.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:57:44 +02:00
Takeshi Kihara
44b12d4311 soc: renesas: rcar-sysc: Add support for R-Car E3 power areas
This patch adds Cortex-A53 CPU{0,1}, Cortex-A53 SCU, Cortex-R7, A3VC,
A2VC1 and 3DG-{A,B} power domain areas for the R8A77990 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[shimoda: fix 3DG-{A,B} and add SPDX-License-Identifier]
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-16 10:57:13 +02:00
Geert Uytterhoeven
a3daeedad3 soc: renesas: r8a77995-sysc: Cleanups
Minor cleanup of artefacts caused by deriving from r8a7795-sysc.c:
  - Remove unused inclusion of <linux/sys_soc.h>,
  - Make r8a77995_areas[] const.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-04-20 12:14:47 +02:00
Takeshi Kihara
b0d77648e0 soc: renesas: rcar-rst: Add support for R-Car E3
Add support for R-Car E3 (R8A77990) to the R-Car RST driver.
This driver is needed for the clock driver to work.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[shimoda: rebase]
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-04-16 16:01:25 +02:00
Takeshi Kihara
44842d4555 soc: renesas: identify R-Car E3
This patch adds support for identifying the R-Car E3 (R8A77990) SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-04-16 16:01:25 +02:00
Biju Das
964f7c0dd2 soc: renesas: rcar-sysc: Add r8a77470 support
Add support for RZ/G1C (R8A77470) SoC power areas to the R-Car SYSC
driver.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-04-16 16:01:24 +02:00
Biju Das
a3a9033f11 soc: renesas: rcar-rst: Add support for RZ/G1C
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-04-16 16:01:24 +02:00
Biju Das
1daf13ba10 soc: renesas: Identify RZ/G1C
Add support for identifying the RZ/G1C (r8a77470) SoC.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-04-16 16:01:24 +02:00
Jacopo Mondi
bf79cd635d soc: renesas: rcar-rst: Add support for R-Car M3-N
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-23 15:55:01 +01:00
Jacopo Mondi
a527709b78 soc: renesas: rcar-sysc: Add R-Car M3-N support
Add support for R-Car M3-N (R8A77965) power areas.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-21 22:51:02 +01:00