In NPCM8XX USB reset sequence, iprst2 register was set with iprst4 value
and iprst4 register wasn´t set.
This fix sets the correct IP reset values in iprst2 and iprst4 registers
in NPCM8XX USB reset sequence.
Fixes: fc5d2a2f4a ("reset: npcm: Add NPCM8XX support")
Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Link: https://lore.kernel.org/r/20220922153856.23326-1-tmaimon77@gmail.com
Updated the NPCM reset driver to add support for Nuvoton BMC NPCM8XX SoC.
As part of adding NPCM8XX support:
- Add NPCM8XX specific compatible string.
- Add NPCM8XX USB reset.
- Add data to handle architecture-specific reset parameters.
- Some of the Reset Id and number of resets are different from NPCM7XX.
Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Using syscon device tree property instead of device data to handle the
NPCM general control registers.
In case the syscon not found the code still search for nuvoton,npcm750-gcr
to support DTS backward compatibility.
Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
