This patch adds a nsproxy structure to the task struct. Later patches will
move the fs namespace pointer into this structure, and introduce a new utsname
namespace into the nsproxy.
The vserver and openvz functionality, then, would be implemented in large part
by virtualizing/isolating more and more resources into namespaces, each
contained in the nsproxy.
[akpm@osdl.org: build fix]
Signed-off-by: Serge Hallyn <serue@us.ibm.com>
Cc: Kirill Korotaev <dev@openvz.org>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>
Cc: Herbert Poetzl <herbert@13thfloor.at>
Cc: Andrey Savochkin <saw@sw.ru>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
cpumask: ensure that the cpu_online_map and cpu_possible_map bitmasks, and
hence all the macros in <linux/cpumask.h> that require them, are available to
modules for all supported combinations of architecture and CONFIG_SMP.
Signed-off-by: Greg Banks <gnb@melbourne.sgi.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
With 2.6.18-rc4-mm2, now wall_jiffies will always be the same as jiffies.
So we can kill wall_jiffies completely.
This is just a cleanup and logically should not change any real behavior
except for one thing: RTC updating code in (old) ppc and xtensa use a
condition "jiffies - wall_jiffies == 1". This condition is never met so I
suppose it is just a bug. I just remove that condition only instead of
kill the whole "if" block.
[heiko.carstens@de.ibm.com: s390 build fix and cleanup]
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Cc: Andi Kleen <ak@muc.de>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Russell King <rmk@arm.linux.org.uk>
Cc: Ian Molton <spyro@f2s.com>
Cc: Mikael Starvik <starvik@axis.com>
Cc: David Howells <dhowells@redhat.com>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Cc: Hirokazu Takata <takata.hirokazu@renesas.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Kyle McMartin <kyle@mcmartin.ca>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Kazumoto Kojima <kkojima@rr.iij4u.or.jp>
Cc: Richard Curnow <rc@rc0.org.uk>
Cc: William Lee Irwin III <wli@holomorphy.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Jeff Dike <jdike@addtoit.com>
Cc: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it>
Cc: Miles Bader <uclinux-v850@lsi.nec.co.jp>
Cc: Chris Zankel <chris@zankel.net>
Cc: "Luck, Tony" <tony.luck@intel.com>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Roman Zippel <zippel@linux-m68k.org>
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
All on stack DECLARE_COMPLETIONs should be replaced by:
DECLARE_COMPLETION_ONSTACK
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Acked-by: Ingo Molnar <mingo@elte.hu>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Pass ticks to do_timer() and update_times(), and adjust x86_64 and s390
timer interrupt handler with this change.
Currently update_times() calculates ticks by "jiffies - wall_jiffies", but
callers of do_timer() should know how many ticks to update. Passing ticks
get rid of this redundant calculation. Also there are another redundancy
pointed out by Martin Schwidefsky.
This cleanup make a barrier added by
5aee405c66 needless. So this patch removes
it.
As a bonus, this cleanup make wall_jiffies can be removed easily, since now
wall_jiffies is always synced with jiffies. (This patch does not really
remove wall_jiffies. It would be another cleanup patch)
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: john stultz <johnstul@us.ibm.com>
Cc: Andi Kleen <ak@muc.de>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Acked-by: Russell King <rmk@arm.linux.org.uk>
Cc: Ian Molton <spyro@f2s.com>
Cc: Mikael Starvik <starvik@axis.com>
Acked-by: David Howells <dhowells@redhat.com>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Cc: Hirokazu Takata <takata.hirokazu@renesas.com>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Cc: Kyle McMartin <kyle@mcmartin.ca>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Kazumoto Kojima <kkojima@rr.iij4u.or.jp>
Cc: Richard Curnow <rc@rc0.org.uk>
Cc: William Lee Irwin III <wli@holomorphy.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Jeff Dike <jdike@addtoit.com>
Cc: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it>
Cc: Miles Bader <uclinux-v850@lsi.nec.co.jp>
Cc: Chris Zankel <chris@zankel.net>
Acked-by: "Luck, Tony" <tony.luck@intel.com>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Roman Zippel <zippel@linux-m68k.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This is an updated version of Eric Biederman's is_init() patch.
(http://lkml.org/lkml/2006/2/6/280). It applies cleanly to 2.6.18-rc3 and
replaces a few more instances of ->pid == 1 with is_init().
Further, is_init() checks pid and thus removes dependency on Eric's other
patches for now.
Eric's original description:
There are a lot of places in the kernel where we test for init
because we give it special properties. Most significantly init
must not die. This results in code all over the kernel test
->pid == 1.
Introduce is_init to capture this case.
With multiple pid spaces for all of the cases affected we are
looking for only the first process on the system, not some other
process that has pid == 1.
Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@us.ibm.com>
Cc: Dave Hansen <haveblue@us.ibm.com>
Cc: Serge Hallyn <serue@us.ibm.com>
Cc: Cedric Le Goater <clg@fr.ibm.com>
Cc: <lxc-devel@lists.sourceforge.net>
Acked-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This patch adds keymapsize, delay and debounce flag in the keypad platform
data for various TI OMAP1/2 based boards like F-sample, H2, H3, Innovator,
Nokia770, OSK, Perseus and H4.
Signed-off-by: Komal Shah <komal_shah802003@yahoo.com>
Cc: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Make PROT_WRITE imply PROT_READ for a number of architectures which don't
support write only in hardware.
While looking at this, I noticed that some architectures which do not
support write only mappings already take the exact same approach. For
example, in arch/alpha/mm/fault.c:
"
if (cause < 0) {
if (!(vma->vm_flags & VM_EXEC))
goto bad_area;
} else if (!cause) {
/* Allow reads even for write-only mappings */
if (!(vma->vm_flags & (VM_READ | VM_WRITE)))
goto bad_area;
} else {
if (!(vma->vm_flags & VM_WRITE))
goto bad_area;
}
"
Thus, this patch brings other architectures which do not support write only
mappings in-line and consistent with the rest. I've verified the patch on
ia64, x86_64 and x86.
Additional discussion:
Several architectures, including x86, can not support write-only mappings.
The pte for x86 reserves a single bit for protection and its two states are
read only or read/write. Thus, write only is not supported in h/w.
Currently, if i 'mmap' a page write-only, the first read attempt on that page
creates a page fault and will SEGV. That check is enforced in
arch/blah/mm/fault.c. However, if i first write that page it will fault in
and the pte will be set to read/write. Thus, any subsequent reads to the page
will succeed. It is this inconsistency in behavior that this patch is
attempting to address. Furthermore, if the page is swapped out, and then
brought back the first read will also cause a SEGV. Thus, any arbitrary read
on a page can potentially result in a SEGV.
According to the SuSv3 spec, "if the application requests only PROT_WRITE, the
implementation may also allow read access." Also as mentioned, some
archtectures, such as alpha, shown above already take the approach that i am
suggesting.
The counter-argument to this raised by Arjan, is that the kernel is enforcing
the write only mapping the best it can given the h/w limitations. This is
true, however Alan Cox, and myself would argue that the inconsitency in
behavior, that is applications can sometimes work/sometimes fails is highly
undesireable. If you read through the thread, i think people, came to an
agreement on the last patch i posted, as nobody has objected to it...
Signed-off-by: Jason Baron <jbaron@redhat.com>
Cc: Russell King <rmk@arm.linux.org.uk>
Cc: "Luck, Tony" <tony.luck@intel.com>
Cc: Hugh Dickins <hugh@veritas.com>
Cc: Roman Zippel <zippel@linux-m68k.org>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Andi Kleen <ak@muc.de>
Acked-by: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: Arjan van de Ven <arjan@linux.intel.com>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Cc: Kazumoto Kojima <kkojima@rr.iij4u.or.jp>
Cc: Ian Molton <spyro@f2s.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Enables the ixp4xx platforms to use Generic time-of-day.
Signed-off-by: Kevin Hilman <khilman@mvista.com>
Acked-by: John Stultz <johnstul@us.ibm.com>
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch adds Generic time-of-day support for the ARM architecture.
The support is currently added using #ifdef's so that it can support
sub-arches that do not (yet) have a clocksource added. As sub-arches
add clocksource support, they should 'select GENERIC_TIME'
Signed-off-by: Deepak Saxena <dsaxena@mvista.com>
Signed-off-by: Daniel Walker <dwalker@mvista.com>
Signed-off-by: Kevin Hilman <khilman@mvista.com>
Acked-by: John Stultz <johnstul@us.ibm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Apply consistant tabbing to the IRQ chip
structures in arch/arm/mach-s3c2410/irq.c
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The demux code for the IRQ EINTs above 3 was
using find last set instead of finding first
set.
Also fix it so that we only check EINT4..7
when the parent EINT4t7 goes off, and the
8..23 when EINT8t23 goes off.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
In nommu mode, the exception vector location depends on the platforms.
Some of the implementations may have some special exception control
forwarding method in their ROM/flash and for some of them has its own
re-mapping mechanism by the h/w.
This patch introduces a special configuration CONFIG_CPU_HIGH_VECTOR which
turns on the CR_V bit in nommu mode. The CR_V bit is turned off by default.
This feature depends on CP15 and does not supported by ARM740.
Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
There is no FSR/FAR register on no-CP15 or MPU cores. This patch adds a
dummy abort handler which returns zero for the base restored Data Abort
model !CPU_CP15_MMU cores. The abort-lv4t.S is still used with the fix-up
for the base updated Data Abort model cores.
Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch removes the static memory mapping for the currently-unused
peripherals [Synchronous Serial, Timer/Counter unit], and for those
drivers that already ioremap() their registers [UART].
Also, the Ethernet driver now uses the platform_device resources but
doesn't yet use ioremap() so we need to pass it the virtual address
instead of the physical address.
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch adds support for the NAND flash on the Atmel AT91RM9200-DK
and KwikByte KB920x boards.
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch makes the AT91 gpio.c support processor-generic (AT91RM9200
and AT91SAM9xxx). The GPIO controllers supported by a particular AT91
processor are defined in the processor-specific file and are registered
with gpio.c at startup.
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch makes the AT91 clock.c support processor-generic (AT91RM9200
and AT91SAM9xxx). The clocks supported by a particular AT91 processor
are defined in the processor-specific file and are registered with
clock.c at startup.
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This is more preparation for adding support for the new Atmel AT91SAM9
processors.
Changes include:
- Replace AT91_BASE_* with AT91RM9200_BASE_*
- Replace AT91_ID_* with AT91RM9200_ID_*
- ROM, SRAM and UHP address definitions moved to at91rm9200.h.
- The raw AT91_P[ABCD]_* definitions are now depreciated in favour of
the GPIO API.
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
this patch registers the wakeup irq, sets a gpio pin to indicate the
status of system for suspend/resume operations, and adds the machine to
the supported machines for use with the simtec-pm
Signed-off-by: David Anders <danders@amltd.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Switch arch/arm/kernel/apm.c from using kernel_thread - whose export
is deprecated - to kthread.
Signed-off-by: Serge E. Hallyn <serue@us.ibm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
hi,
a quick find -iname \*.[ch] | xargs grep "> ARRAY_SIZE(", revealed
these in the icst drivers.
If i == ARRAY_SIZE, we get past the idx2s array.
Signed-off-by: Eric Sesterhenn <snakebyte@gmx.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch adds another hook into sharpsl_pm to notify the machine
specific driver immediately after resume. This is needed to support the Sharp SL-6000 (Tosa).
Signed-off-by: Dirk Opfer <Dirk@Opfer-Online.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The Locomo chip has a SPI interface which is used for SD/MMC cards (only collie).
This patch adds the definition for the SPI device inside the Locomo chip.
Signed-off-by: Dirk Opfer <Dirk@Opfer-Online.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Convert LOMOMO to use struct device * for GPIOs instead of struct
locomo_dev. This enables access to the GPIOs from code which is not
a locomo device itself (such as audio). Access for gpio 31 is removed
for error handling (no such hardware exists).
Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This updates the PXA 25x UDC board-independent infrastructure for VBUS sensing
and the D+ pullup. The original code evolved from rather bizarre support on
Intel's "Lubbock" reference hardware, so that on more sensible hardware it
doesn't work as well as it could/should.
The change is just to teach the UDC driver how to use built-in PXA GPIO pins
directly. This reduces the amount of board-specfic object code needed, and
enables the use of a VBUS sensing IRQ on boards (like Gumstix) that have one.
With VBUS sensing, the UDC is unclocked until a host is actually connected.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This patch adds ARM946E-S core support which has typically 8KB I&D cache.
It has a MPU and supports ARMv5TE instruction set.
Because the ARM946E-S core can be synthesizable with various cache size,
CONFIG_CPU_DCACHE_SIZE is defined for vendor specific configurations.
Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch adds ARM940T core support which has 4KB D-cache, 4KB I-cache
and a MPU.
Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch adds ARM9TDMI core support which has no cache and no CP15
register(no memory control unit).
Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch adds ARM740T core support which has a MPU and 4KB or 8KB cache.
Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch adds ARM7TDMI core support which has no cache and no CP15
register(no memory control unit).
Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
All the current CP15 access codes in ARM arch can be categorized and
conditioned by the defines as follows:
Related operation Safe condition
a. any CP15 access !CPU_CP15
b. alignment trap CPU_CP15_MMU
c. D-cache(C-bit) CPU_CP15
d. I-cache CPU_CP15 && !( CPU_ARM610 || CPU_ARM710 ||
CPU_ARM720 || CPU_ARM740 ||
CPU_XSCALE || CPU_XSC3 )
e. alternate vector CPU_CP15 && !CPU_ARM740
f. TTB CPU_CP15_MMU
g. Domain CPU_CP15_MMU
h. FSR/FAR CPU_CP15_MMU
For example, alternate vector is supported if and only if
"CPU_CP15 && !CPU_ARM740" is satisfied.
Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
By merging of uClinux/ARM, we need to treat various CPU cores which have
MMU, MPU or even none for memory management. The memory management
coprocessors are controlled by CP15 register set and the ARM core family
can be categorized by 5 groups by the register ;
G-a. CP15 is MMU : 610, 710, 720, 920, 922, 925, 926, 1020, 1020e, 1022,
v6 and the derivations sa1100, sa110, xscale, xsc3.
G-b. CP15 is MPU : 740, 940, 946, 996, 1156.
G-c. CP15 is MPU or MMU : 1026 (selectable by schematic design)
G-d. CP15 is exist, but nothing for memory managemnt : 966, 968.
G-e. no-CP15 : 7tdmi, 9tdmi, 9e, 9ej
This patch defines CPU_CP15, CPU_CP15_MMU and CPU_CP15_MPU. Thus the
family can be defined as :
- CPU_CP15 only : G-d
- CPU_CP15_MMU(implies CPU_CP15) : G-a, G-c(selectable)
- CPU_CP15_MPU(implies CPU_CP15) : G-b, G-c(selectable)
- !CPU_CP15 : G-e
Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
A simple patch to support module in nommu mode.
The vmalloc is used instead of __vmalloc_area which depends on CONFIG_MMU.
Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Since do_bad_area() always takes the currently active task and
(supposed to) take the currently active MM, there's no point passing
them to this function. Instead, obtain references to them inside
do_bad_area().
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
mm-armv.c now only contains the pgd allocation/freeing code, so
rename it to have a more sensible filename.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
If we're going to have mmu.c for code which is specific to the MMU
machines, we might as well move the other MMU initialisation
specific code from mm-armv.c into this new file. This also allows
us to make some functions static.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
nommu does not require the page table manipulation code in the
bootmem initialisation paths. Move this into separate inline
functions.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The ARM Versatile board PCI config space read routines are broken for byte
accesses. The access uses a byte read, so masking the bottom two bits of the
address is wrong.
I guess this is a cut/paste error from the the halfword code which uses
aligned word access+shift+mask.
Signed-off-by: Paul Brook <paul@codesourcery.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The ARM XIP_KERNEL map created in devicemaps_init() is wrong.
The map.pfn is rounded down to an even 1MiB section boundary
which results in va/pa translations errors when XIP_PHYS_ADDR
starts on an odd 1MiB boundary and this causes the kernel to
hang. This patch fixes ARM XIP_KERNEL translation errors for
the odd 1MiB XIP_PHYS_ADDR boundary case.
Signed-off-by: George G. Davis <gdavis@mvista.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add S3C2412 power management code, and move the
core register saving in from s3c2412.c
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add the AML M5900 series to the list of supported machines in the
arch/arm/mach-s3c2410 directory. This ensures the core peripherals
are registered, and the timer source is configured. if selected in
the kernel config the framebuffer registers and mtd partition
information are set. This version of the patch has corrected
formatting and removed the legacy procfs directory entry.
Signed-off-by: David Anders <danders@amltd.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
