Commit Graph

13 Commits

Author SHA1 Message Date
Christian König
9cc2e0e9f1 drm/radeon: never unpin UVD bo v3
Changing the UVD BOs offset on suspend/resume doesn't work because the VCPU
internally keeps pointers to it. Just keep it always pinned and save the
content manually.

Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=66425

v2: fix compiler warning
v3: fix CIK support

Note: a version of this patch needs to go to stable.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-07-14 10:11:30 -04:00
Jerome Glisse
0a16893397 drm/radeon: use radeon device for request firmware
Avoid creating temporary platform device that will lead to issue
when several radeon gpu are in same computer. Instead directly use
the radeon device for requesting firmware.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-07-14 10:11:27 -04:00
Maarten Lankhorst
ecff665f5e drm/ttm: make ttm reservation calls behave like reservation calls
This commit converts the source of the val_seq counter to
the ww_mutex api. The reservation objects are converted later,
because there is still a lockdep splat in nouveau that has to
resolved first.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-06-28 12:02:20 +10:00
Alex Deucher
8a227555a8 drm/radeon/kms: enable UVD as needed (v9)
When using UVD, the driver must switch to a special UVD power
state.  In the CS ioctl, switch to the power state and schedule
work to change the power state back, when the work comes up,
check if uvd is still busy and if not, switch back to the user
state, otherwise, reschedule the work.

Note:  We really need some better way to decide when to
switch out of the uvd power state.  Switching power states
while playback is active make uvd angry.

V2: fix locking.

V3: switch from timer to delayed work

V4: check fence driver for UVD jobs, reduce timeout to
    1 second and rearm timeout on activity

v5: rebase on new dpm tree

v6: rebase on interim uvd on demand changes

v7: fix UVD when DPM is disabled

v8: unify non-DPM and DPM UVD handling

v9: remove leftover idle work struct

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>
2013-06-27 19:15:49 -04:00
Christian König
87167bb16d drm/radeon: add UVD support for CIK (v3)
v2: agd5f: fix clock dividers setup for bonaire
v3: agd5f: rebase

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:50 -04:00
Alex Deucher
9b1be4dc02 drm/radeon: fix UVD on big endian
This fixes the kernel side so that the ring should come
up and ring and IB tests should work.  The userspace
UVD drivers will also need big endian fixes.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-12 08:17:21 -04:00
Jerome Glisse
089920f21d drm/radeon: fix write back suspend regression with uvd v2
UVD ring can't use scratch thus it does need writeback buffer to keep
a valid address or radeon_ring_backup will trigger a kernel fault.

It's ok to not unpin the write back buffer on suspend as it leave in
gtt and thus does not need eviction.

v2: Fix the uvd case.

Reported and tracked by Wojtek <wojtask9@wp.pl>

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-12 08:16:29 -04:00
Christian König
facd112d13 drm/radeon: consolidate UVD clock programming
Instead of duplicating the code over and over again, just use a single
function to handle the clock calculations.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-05-02 10:09:48 -04:00
Christian König
55b51c88c5 drm/radeon: raise UVD clocks only on demand
That not only saves some power, but also solves problems with
older chips where an idle UVD block on higher clocks can
cause problems.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-04-23 17:45:44 -04:00
Christian König
d7c605a20e drm/radeon: fix alignment of UVD fence
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-04-22 10:39:11 -04:00
Christian König
a92c7d554f drm/radeon: cleanup UVD address checks
Message and feedback buffers must be at start of
VRAM, not at start of address space.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-04-22 10:39:10 -04:00
Christian König
ec5891fbe1 drm/radeon: init UVD clocks to sane defaults
Just until we get proper DPM for that.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-04-09 10:31:38 -04:00
Christian König
f2ba57b5ea drm/radeon: UVD bringup v8
Just everything needed to decode videos using UVD.

v6: just all the bugfixes and support for R7xx-SI merged in one patch
v7: UVD_CGC_GATE is a write only register, lockup detection fix
v8: split out VRAM fallback changes, remove support for RV770,
    add support for HEMLOCK, add buffer sizes checks

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-04-09 10:31:33 -04:00