Follow up to pfc-sh73a0.c's pull-up support.
Change GPIO_FN_KEYINx to GPIO_FN_KEYINx_PU.
Signed-off-by: Takashi YOSHII <takashi.yoshii.zj@renesas.com>
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
On SH-Mobile, Pull UP/Downs can be controlled independently
from Function selectors (by lower nibble of PFCR).
It means people may want to use GPIO_FN_xxx_PU/PD in addition
to GPIO_IN_PU/PD which is currently supported.
This patch adds pull-up version for some input signals on
KEYSC, MMC, FSIA as well as SDHI1.
Signed-off-by: Takashi YOSHII <takashi.yoshii.zj@renesas.com>
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Fix the sh73a0 KEYSC clock control by adding MSTP403
to mstp_clks[]. Use KEYSC instead of KEYSC0 in comments.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Add support for 2 TMU timer channels on sh73a0.
One timer channel is used for clocksource and
the other is used for clockevents. All channels
in the same TMU block share MSTP bit as usual.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Add INTCS support for the sh73a0 processor.
The interrupts on the sh73a0 processor are managed
through controllers such as GIC, INTCS and INTCA.
The ARM cores use the GIC as primary interrupt
controller and the INTCS and INTCA are hanging off
the GIC as cascaded interrupt controllers.
Peripherals connected both to the GIC and the INTC
controllers should if possible only use the GIC.
If no GIC connection is available then INTCS and
INTCA may be used instead.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Increase NR_IRQS from 512 to 1024 on SH-Mobile ARM.
Needed to support vectors in the sh73a0 INTCS block.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Fix interrupt priority level handling on SH-Mobile ARM.
SH-Mobile ARM platforms using multiple interrupt priority
levels need this patch to fix a potential dead lock that
may occur if multiple interrupts with different levels
are pending simultaneously.
The default INTC configuration is to use the same priority
level for all interrupts, so this issue does not trigger by
default. It is however common for board code to override the
interrupt priority for certain interrupt sources depending
on the application. Without this fix such boards may lock up.
In detail, this patch updates the INTC code in entry-macro.S
to make sure that the INTLVLA register gets set as expected.
To trigger this bug modify the board specific code to adjust
the interrupt priority level for the ethernet chip. After
changing the priority level simply use flood ping to drown
the board with interrupts.
This patch applies to INTCA-based processors such as sh7372,
sh7377 and sh7372. GIC-based processors are not affected.
Suitable for v2.6.37-rc and stable from v2.6.34 to v2.6.36.
Cc: stable@kernel.org
Signed-off-by: Magnus Damm <damm@opensource.se>
Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Turn down the warning noise from the compiler,
basically a SH-Mobile specific version of the
patch located in the RMK patch tracker:
6484/1: "fix compile warning in mm/init.c",
Without this patch the following warning triggers:
CC arch/arm/kernel/sys_arm.o
arch/arm/mm/init.c: In function 'mem_init':
arch/arm/mm/init.c:606: warning: format '%08lx' expects type 'long unsigned int', but argument 12 has type 'unsigned int'
CC arch/arm/kernel/traps.o
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Compiling in multiple CPUs into the same kernel binary
requires a Makefile update. With this patch in place
it is possible to enable the pinmux code for both the
SH7372 and the SH7377.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch maps key0/key1/key2/key3 as HOME/MENU/BACK/POWER buttons
on mackerel board.
Signed-off-by: Tony SIM <chinyeow.sim.xt@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch improves the state of the AG5 clock
framework support. The main clock parent is
automatically detected, but most of the clocks
are not used by any driver or subsystem at this
point. More work is needed for support of multi
media hardware such as FSI and/or LCDC/MIPI-DSI.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
you can control it by
echo 0 > /sys/class/leds/led0/brightness
echo 1 > /sys/class/leds/led0/brightness
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch permuted clock arrays in the order of MSTP
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Have to add DMA slave configuration to enable DMA for the sh7372 MMCIF
controller.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Add DMA slave IDs and slave definitions for MMCIF on sh7372.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The PLLC2 clock was utilizing the same sort of enable/disable without
regard to usecount approach that the FSIDIV clock was when being used as
a PLL pass-through. This forces the enable/disable through the clock
framework, which now prevents the clock from being ripped out or modified
underneath users that have an existing handle on it.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Current AP4 FSI didn't use set_rate for ak4642,
and used dummy rate when init.
And FSI driver was modified to always call set_rate.
The user which are using FSI set_rate is only AP4 now.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Current AP4 FSI set_rate function used bogus clock process
which didn't care enable/disable and clk->usecound.
To solve this issue, this patch also modify FSI driver to call
set_rate with enough options.
This patch modify it.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Current FSIDIV clock framework had bogus disable.
This patch remove it.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Just add port multiplex settings to enable i2c modules.
Signed-off-by: Takashi YOSHII <takashi.yoshii.zj@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This consists of platform device resources/data for the board, and
simple clvdev entry for MSTP bit for keysc module.
This support only 49 of 80 key-switches on the board.
Signed-off-by: Takashi YOSHII <takashi.yoshii.zj@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Ag5evm board now uses gpio api to initialize pins and peripherals.
Signed-off-by: Takashi YOSHII <takashi.yoshii.zj@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
PFC definitions for sh73a0 to support GPIO and pinmux handling.
Signed-off-by: Takashi YOSHII <takashi.yoshii.zj@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Presently the entry macros are all globbed together, this simply splits
them out in to their insular variants. Future work such as the GIC
generalization will replace some of these and tidy the abstraction up
further.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch adds initial support for Renesas SH-Mobile AG5.
At this point the AG5 CPU support is limited to the ARM
core, SCIF serial and a CMT timer together with L2 cache
and the GIC. The AG5EVM board also supports Ethernet.
Future patches will add support for GPIO, INTCS, CPGA
and platform data / driver updates for devices such as
IIC, LCDC, FSI, KEYSC, CEU and SDHI among others.
The code in entry-macro.S will be cleaned up when the
ARM IRQ demux code improvements have been merged.
Depends on the AG5EVM mach-type recently registered but
not yet present in arch/arm/tools/mach-types.
As the AG5EVM board comes with 512MiB memory it is
recommended to turn on HIGHMEM.
Many thanks to Yoshii-san for initial bring up.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Fix a MSTP assignment problem in the sh7372 clock
framework code. The USB drivers should attach to
MSTP322 not MSTP33 where IIC1 is located.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Presently each one of the CPUs manually selects the same feature set, and
there's a reasonable expectation that none of these will change for
future CPUs in the SH-Mobile / R-Mobile family, so we move those over to
the top-level ARCH_SHMOBILE.
While we're at it, all of the CPUs support optional GPIOs via the PFC,
do not have I/O ports, and expect sparse IRQ, so we bring the
configuration in line across the board.
This more or less brings the ARM-based parts in sync with their SH
counterparts.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Now that clk_set_rate_ex() is gone, there is also no way to get at rate
setting algo id, which is now also completely unused. Kill it off before
new clock ops start using it.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
